Input vector control for post-silicon leakage current minimization under manufacturing variations
We present the first approach for post-silicon leakage power reduction through input vector control (IVC) that takes into account the impact of the manufacturing variability (MV). Because of the MV, the integrated circuits (ICs) implementing one design require different input vectors to achieve their lowest leakage states. There are two major challenges that have to be addressed. The first is the extraction of the gate-level characteristics of an IC by measuring only the overall leakage power for different inputs. The second problem is the rapid generation of input vectors that result in a low leakage for a large number of unique ICs that implement a given design, but are different in the post-manufacturing phase. We solve the first problem using a linear programming formulation that in a polynomial time, finds the most likely gate-level characterization of a pertinent IC. The approach is provably optimal, if there are no measurement errors; we also examine the erroneous cases. We address the second problem using the coordinated application of statistical clustering and the very large neighborhood iterative improvement algorithm. Experimental results on a large set of benchmark instances demonstrate the efficiency of the proposed methods. For example, the leakage power consumption could be reduced in average by more than 10.4%, when compared to the previously published IVC techniques that did not consider MV.