Now showing items 21-40 of 245

    • Acumen: An Environment for Rapid Prototyping of Cyber-physical Systems 

      Zhu, Yun (2009-09-09)
      Cyber-Physical Systems (CPS) combine discrete and continuous physical processes. Developing a new cyber-physical system is an iterative process that involves design, simulation, prototyping, and production. Writing simulation code using current techniques is time consuming. My thesis is that a carefully designed, domain-specific language can alleviate ...
    • Adding Operator Strength Reduction to LLVM 

      West, Brian N. (2011-10-20)
      As part of the Platform-Aware Compilation Environment (PACE) Project1, Operator Strength Reduction (OSR) [3] was added to the LLVM Compiler Infrastructure Project (LLVM) as a optimization pass. The goal of the PACE Project is to construct a portable compiler that produces code capable of achieving high levels of performance on new architectures. The ...
    • Advanced Data-Parallel Compilation 

      Chavarria-Miranda, Daniel (2004-03-09)
      Over the past few decades, scientific research has grown to rely increasingly on simulation and other computational techniques. This strategy has been named in silico research. Computation is increasingly important for testing theories and obtaining results in fields where experimentation is not currently possible (e.g. astrophysics, cosmology, climate ...
    • Algorithmic Improvements in Approximate Counting for Probabilistic Inference: From Linear to Logarithmic SAT Calls* 

      Chakraborty, Supratik; Meel, Kuldeep S.; Vardi, Moshe Y. (2016-11-28)
      Probabilistic inference via model counting has emerged as a scalable technique with strong formal guarantees, thanks to recent advances in hashing-based approximate counting. State-of-the-art hashing-based counting algorithms use an NP oracle (SAT solver in practice), such that the number of oracle invocations grows linearly in the number of variables ...
    • An Analysis of BitTorrent’s Two Kademlia-Based DHTs 

      Crosby, Scott A.; Wallach, Dan S. (2007-05-26)
      Despite interest in structured peer-to-peer overlays and their scalability to millions of nodes, few, if any, overlays operate at that scale. This paper considers the distributed hash table extensions supported by modern BitTorrent clients, which implement a Kademlia-style structured overlay network among millions of BitTorrent users. As there are ...
    • An Efficient Threading Model to Boost Server Performance 

      Chanda, Anupam; Cox, Alan L.; Elmeleegy, Khaled; Gil, Romer; Mittal, Sumit; (2004-09-13)
      We investigate high-performance threading architectures for I/O intensive multi-threaded servers. We study thread architectures from two angles: (1) number of user threads per kernel thread, and (2) use of synchronous I/O vs. asynchronous I/O. We underline the shortcomings of 1-to-1threads with synchronous I/O, N-to-1 threads with asynchronous I/O, ...
    • An Empirical Evaluation of Dependence Analysis in Parallel Program Comprehension 

      Monk, Douglas M. (1995-05)
      This research contributes two advances to the field of empirical study of parallel programming: first, the introduction of the Xbrowser system, a unique general-purpose hypertext/hypermedia system combining high-quality text formatting using TEX* or LATEX with author-controlled support for event-level protocol analysis and computer-assisted instruction. ...
    • An Experimental Evaluation of List Scheduling 

      Cooper, Keith D.; Schielke, Philip; Subramanian, Devika (1998-09-30)
      While altering the scope of instruction scheduling has a rich heritage in compiler literature, instruction scheduling algorithms have received little coverage in recent times. The widely held belief is that greedy heuristic techniques such as list scheduling are "good" enough for most practical purposes. The evidence supporting this belief is largely ...
    • An Integer Set Framework for HPF Analysis and Code Generation 

      Adve, Vikram S.; Mellor-Crummey, John; Sethi, Ajay (1997-04-22)
      Communication analysis and code generation for data parallel languages are naturally formulated as operations on integer sets. Principal analysis and code generation tasks require manipulation of sets of data, sets of processors, and sets of iterations. We describe a practical, executable, equational framework for analysis and optimization of High ...
    • An Integrated Compile-Time/Run-Time Software Distributed Shared Memory System 

      Cox, Alan; Dwarkadas, Sandhya; Zwaenepoel, Willy (1997-11-17)
      High Performance Fortran (HPF), as well as its predecessor FortranD,has attracted considerable attention as a promising language for writing portable parallel programs for a wide variety of distributed-memory architectures. Programmers express data parallelism using Fortran90 array operations and use data layout directives to direct the partitioning ...
    • An Optimizing Fortran D Compiler for MIMD Distributed-Memory Machines 

      Tseng, Chau-Wen (1993-01)
      Massively parallel MIMD distributed-memory machines can provide enormous computational power; however, the difficulty of developing parallel programs for these machines has limited their use. Our thesis is that an advanced compiler can generate efficient parallel programs, if data decompositions are provided. To validate this thesis, we have implemented ...
    • Analysis of Hadoop’s Performance under Failures 

      Dinu, Florin; Ng, T. S. Eugene (2011-08-11)
      Failures are common in today’s data center environment and can significantly impact the performance of important jobs running on top of large scale computing frameworks. In this paper we analyze Hadoop’s behavior under compute node and process failures. Surprisingly, we find that even a single failure can have a large detrimental effect on job running ...
    • Analysis of Synchronization in a Parallel Programming Environment 

      Subhlok, Jaspal S. (1990-08)
      Parallel programming is an intellectually demanding task. One of the most difficult challenges in the development of parallel programs for asynchronous shared memory systems is avoiding errors caused by inadvertent data sharing, often referred to as data races. Static prediction of data races requires data dependence analysis, as well as analysis of ...
    • Ants and Reinforcement Learning: A Case Study in Routing in Dynamic Networks 

      Chen, Johnny; Druschel, Peter; Subramanian, Devika (1997-02-17)
      We investigate two new distributed routing algorithms for data networks based on simple biological "ants" that explore the network and rapidly learn good routes, using a novel variation of reinforcement learning. These two algorithms are fully adaptive to topology changes and changes in link costs in the network, and have space and computational ...
    • Atlas + X: Sampling-based Planners on Constraint Manifolds 

      Voss, Caleb; Moll, Mark; Kavraki, Lydia E. (2017-06-14)
      Sampling-based planners struggle when the valid configurations are constrained to an implicit manifold. Special planners have been proposed for this problem recently. Our new framework is decoupled from any particular planner and augments existing algorithms not explicitly designed for constraint planning. We demonstrate the advantages of our generalized ...
    • AutoDock-based incremental docking protocol improves docking of large ligands 

      Dhanik, Ankur; Kavraki, Lydia E.; McMurray, John S. (2012-10-07)
      It is well known that computer-aided docking of large ligands, with many rotatable bonds, is extremely difficult. AutoDock is a widely used docking program that can dock small ligands, with up to 5 or 6 rotatable bonds, accurately and quickly. Docking of larger ligands, however, is not very accurate and is computationally expensive. In this paper we ...
    • Automated Design, Implementation, and Evaluation of Arbiter-based PUF on FPGA using Programmable Delay Lines 

      Devadas, Srinivas; Kharaya, Akshat; Koushanfar, Farinaz; Majzoobi, Mehrdad (2014-08-18)
      This paper proposes a novel approach for automated implementation of an arbiter-based physical unclonable function (PUF) on field programmable gate arrays (FPGAs). We introduce a high resolution programmable delay logic (PDL) that is implemented by harnessing the FPGA lookup-table (LUT) internal structure. PDL allows automatic fine tuning of delays ...
    • Automatic and Interactive Parallelization 

      McKinley, Kathryn (1994-03)
      The goal of this dissertation is to give programmers the ability to achieve high performance by focusing on developing parallel algorithms, rather than on architecture-specific details. The advantages of this approach also include program portability and legibility. To achieve high performance, we provide automatic compilation techniques that tailor ...
    • Automatic Data Layout for Distributed Memory Machines 

      Kremer, Ulrich (1995-10)
      The goal of languages like Fortran D or High Performance Fortran(HPF) is to provide a simple yet efficient machine-independent parallel programming model. Besides the algorithm selection, the data layout choice is the key intellectual challenge in writing an efficient program in such languages. The performance of a data layout depends on the target ...
    • Automatic Detection of Inter-application Permission Leaks in Android Applications 

      Burke, Michael G.; Guarnieri, Salvatore; Pistoia, Marco; Sarkar, Vivek; Sbîrlea, Dragoș (2013-01-23)
      Due to their growing prevalence, smartphones can access an increasing amount of sensitive user information. To better protect this information, modern mobile operating systems provide permission-based security, which restricts applications to only access a clearly defined subset of system APIs and user data. The Android operating system builds upon ...