Now showing items 1-3 of 3
Untimed-C based SoC Architecture Design Space Exploration for 3G and Beyond Wireless Systems
In this paper, we propose an un-timed C/C++ level verification methodology that integrates key technologies for truly high-level VLSI modelling to keep pace with the explosive complexity of SoC designs in the 3G and beyond ...
A low complexity and low power SoC design architecture for adaptive MAI suppression in CDMA systems
In this paper, we propose a reduced complexity and power efficient System-on-Chip (SoC) architecture for adaptive interference suppression in CDMA systems. The adaptive Parallel-Residue-Compensation architecture leads to ...
Rapid Industrial Prototyping and Scheduling of 3G/4G SoC Architectures with HLS Methodology
In this paper, we present a Catapult C/C++ based methodology that integrates key technologies for high-level VLSI modelling of 3G/4G wireless systems to enable extensive time/area tradeoff study. A Catapult C/C++ based ...