Browsing Electrical and Computer Engineering by Title
Now showing items 12121231 of 1766

An Overview of the AT&T Spoken Document Retrieval System
(19980115)We present an overview of a spoken document retrieval system developed at AT&T LabsResearch for the HUB4 Broadcast News corpus. This overview includes a description of the intonational phrase boundary detection, ... 
pEfficient Estimators
(19750820)This paper is concerned with estimates of an unknown vector parameter S based on observations X. A generalized error autocorrelation matrix with components the error moments of order 2p, is defined. A lower bound for ... 
PACKET COMMUNICATION IN DELTA AND RELATED NETWORKS
(1981)Delta networks are a class of multistage interconnection networks that can be used to interconnect a large number of modules in a modular computing system. In a packet communication environment, the modules in a system ... 
Parallel algorithms and architectures for nearfar resistant CDMA acquisition
(1996)Subspacebased algorithms are a class of algorithms for estimation problems in array signal processing and more recently nearfar resistant Code Division Multiple Access (CDMA) acquisition problems. Subspacebased algorithms ... 
Parallel Algorithms and Architectures for nearfar resistant CDMA acquisition
(19960520)Subspacebased algorithms are a class of algorithms for estimation problems in array signal processing and more recently nearfar resistant Code Division Multiple Access (CDMA) acquisition problems. Subspacebased algorithms ... 
Parallel algorithms and architectures for subspace based channel estimation for CDMA communication systems
(19960820)This paper presents an overview and results from an ongoing research project to study parallel algorithms for the acquisition of Code Division Multiple Access (CDMA) communication signals. The goal of this research isto ... 
A Parallel Graph Algorithm for Finding Connected Components
(19751020)A parallel program is presented that determines the connected components of an undirected graph in time 0(log<sup>2</sup>n) using n<sup>2</sup> processors. It is assumed that the processors have access to common memory. ... 
Parallel Interleaver Architecture with New Scheduling Scheme for High Throughput Configurable Turbo Decoder
(201305)Parallel architecture is required for high throughput turbo decoder to meet the data rate requirements of the emerging wireless communication systems. However, due to the severe memory conflict problem caused by parallel ... 
Parallel Nonbinary LDPC Decoding on GPU
(20121201)Nonbinary LowDensity ParityCheck (LDPC) codes are a class of errorcorrecting codes constructed over the Galois field GF(q) for q > 2. As extensions of binary LDPC codes, nonbinary LDPC codes can provide better ... 
Parallel SearchingBased Sphere Detector for MIMO Downlink OFDM Systems
(20120601)In this paper, implementation of a detector with parallel partial candidatesearch algorithm is described. Two fully independent partial candidate search processes are simultaneously employed for two groups of transmit ... 
PARALLEL SOLUTION TO LINEAR RECURRENCE (ARCHITECTURE)
(1987)In this thesis we present an optimal time parallel solution to the problem of first order linear recurrence. Given a system of n first order equations, the proposed parallel algorithm solves it in time O(n/p + logp) on a ... 
Parallel VLSI Architectures for MultiGbps MIMO Communication Systems
(2011)In wireless communications, the use of multiple antennas at both the transmitter and the receiver is a key technology to enable high data rate transmission without additional bandwidth or transmit power. Multipleinput ... 
Parallel VLSI Architectures for MultiGbps MIMO Communication Systems
(2011)In wireless communications, the use of multiple antennas at both the transmitter and the receiver is a key technology to enable high data rate transmission without additional bandwidth or transmit power. Multipleinput ... 
Parallel VLSI Architectures for RealTime Control of Redundant Robots
(19910201)We present new architectures for the efficient computation of redundant manipulator inverse kinematics. A key component of our architecture is the calculation in VLSI hardware of the Singular Value Decomposition of the ... 
Parallel VLSI Architectures for RealTime Kinematics of Redundant Robots
(19940101)We describe new architectures for the efficient computation of redundant manipulator kinematics (direct and inverse). By calculating the core of the problem in hardware, we can make full use of the redundancy by implementing ... 
Parallel VLSI Architectures for RealTime Kinematics of Redundant Robots
(19930501)We describe new architectures for the efficient computation of redundant manipulator kinematics (direct and inverse). By calculating the core of the problem in hardware, we can make full use of the redundancy by implementing ... 
PARAMETER ESTIMATION FOR THE GENERALIZED GAUSSIAN NOISE MODEL
(1987)The primary objective of this study is to propose an estimator of the parameters of the generalized Gaussian noise model with desirable asymptotic properties, namely, asymptotic consistency and asymptotic efficiency. Three ... 
PARAMETRIC AND NONPARAMETRIC METHODS OF IMPROVING BEARING ESTIMATION IN NARROWBAND PASSIVE SONAR SYSTEMS
(1987)Two approachesone parametric and one nonparametricto the source bearing estimation problem for narrowband passive sonar are presented. The parametric technique does not directly involve estimation of a spatial spectrum. ...