Now showing items 1-60 of 252

  • Accelerating Computer Vision Algorithms Using OpenCL Framework on Mobile Devices - A Case Study 

    Wang, Guohui; Xiong, Y.; Yun, Jay; Cavallaro, Joseph R. (IEEE, 2013-06)
    Recently, general-purpose computing on graphics processing units (GPGPU) has been enabled on mobile devices thanks to the emerging heterogeneous programming models such as OpenCL. The capability of GPGPU on mobile devices ...
  • Adaptive Fault Detection and Tolerance for Robots 

    Visinsky, Monica L.; Cavallaro, Joseph R.; Walker, Ian D. (TSI Press, 1994-08-01)
    In existing robot fault detection schemes, sensed values of the joint status (position, velocity, etc.) are typically compared against expected or desired values, and if a given threshold is exceeded, a fault is inferred. ...
  • Analysis of Robots for Hazardous Environments 

    Harpel, Barbara McLaughlin; Dugan, Joanne Bechta; Walker, Ian D.; Cavallaro, Joseph R. (IEEE, 1997-01-01)
    Reliability analysis of fault tolerant systems often ignores the small probability that a failure might not be detected or, if detected, may not be properly handled. The probability that the failure is detected and properly ...
  • Application-Specific Accelerators for Communications 

    Sun, Yang; Amiri, Kiarash; Brogioli, Michael; Cavallaro, Joseph R. (Springer Science+Business Media, LLC, 2010-01-01)
    For computation-intensive digital signal processing algorithms, complexity is exceeding the processing capabilities of general-purpose digital signal processors (DSPs). In some of these applications, DSP hardware accelerators ...
  • Approximate Matrix Inversion for High-Throughput Data Detection in Large-Scale MIMO Uplink 

    Wu, M.; Yin, B.; Vosoughi, A.; Studer, C.; Cavallaro, Joseph R.; Dick, C. (IEEE, 2013-05)
    The high processing complexity of data detection in the large-scale multiple-input multiple-output (MIMO) uplink necessitates high-throughput VLSI implementations. In this paper, we propose—to the best of our knowledge—first ...
  • Architecture and Algorithm for a Stochastic Soft-output MIMO Detector 

    Amiri, Kiarash; Radosavljevic, Predrag; Cavallaro, Joseph R. (IEEE, 2007-11-04)
    In this paper, we propose a novel architecture for a soft-output stochastic detector in multiple-input, multiple-output (MIMO) systems. The stochastic properties of this detector are studied and derived in this work, ...
  • Architecture and Algorithm for a Stochastic Soft-output MIMO Detector 

    Amiri, Kiarash; Radosavljevic, Predrag; Cavallaro, Joseph R. (IEEE, 2007-11-01)
    In this paper, we propose a novel architecture for a soft-output stochastic detector in multiple-input, multiple-output (MIMO) systems. The stochastic properties of this detector are studied and derived in this work, and ...
  • ARCHITECTURE DESIGN AND IMPLEMENTATION OF THE INCREASING RADIUS - LIST SPHERE DETECTOR ALGORITHM 

    Myllylä, Markus; Juntti, Markku; Cavallaro, Joseph R. (IEEE, 2009-04-01)
    A list sphere detector (LSD) is an enhancement of a sphere detector (SD) that can be used to approximate the optimal MAP detector. In this paper, we introduce a novel architecture for the increasing radius (IR)-LSD algorithm, ...
  • Architecture Design and Implementation of the Metric First List Sphere Detector Algorithm 

    Myllylä, Markus; Cavallaro, Joseph R.; Juntti, Markku (IEEE, 2011-05-01)
    Soft-output detection of a multiple-input–multiple-output (MIMO) signal pose a significant challenge in future wireless systems. In this paper, we introduce a soft-output modified metric first (MMF)-LSD algorithm for MIMO ...
  • Architectures for a CORDIC SVD Processor 

    Cavallaro, Joseph R.; Luk, Franklin T. (SPIE - The International Society for Optical Engineering, 1986-08-21)
    Architectures for systolic array processor elements for calculating the singular value decomposition (SVD) are proposed. These special purpose VLSI structures incorporate the coordinate rotation (CORDIC) algorithms to ...
  • Architectures for Cognitive Radio Testbeds and Demonstrators – An Overview 

    Gustafsson, Oscar; Amiri, Kiarash; Andersson, Dennis; Blad, Anton; Bonner, Christian; Cavallaro, Joseph R.; Declerck, Jeroen; Dejonghe, Antoine; Eliardsson, Patrik; Glasse, Miguel; Hayar, Aawatif; Hollevoet, Lieven; Hunter, Chris; Joshi, Madhura; Kaltenberger, Florian; Knopp, Raymond; Le, Khanh; Miljanic, Zoran; Murphy, Patrick; Naessens, Frederik; Nikaein, Navid; Nussbaum, Dominique; Pacalet, Renaud; Raghavan, Praveen; Sabharwal, Ashutosh; Sarode, Onkar; Spasojevic, Predrag; Sun, Yang; Tullberg, Hugo M.; Vander Aa, Tom; Van der Perre, Liesbet; Wetterwald, Michelle; Wu, Michael (IEEE, 2010-06-01)
    Wireless communication standards are developed at an ever-increasing rate of pace, and significant amounts of effort is put into research for new communication methods and concepts. On the physical layer, such topics include ...
  • Architectures for Heterogeneous Multi-Tier Networks 

    Cavallaro, Joseph R. (2002-01-15)
    Next-generation wireless computing platforms will contain flexible communications capabilites. At Rice University, the Rice Everywhere NEtwork (RENE) project is investigating a multi-standard, multi-tier integration of ...
  • Arithmetic Acceleration Techniques for Wireless Communication Receivers 

    Das, Suman; Rajagopal, Sridhar; Sengupta, Chaitali; Cavallaro, Joseph R. (1999-10-20)
    We develop techniques to accelerate the implementation of the next generation wireless communication algorithms in hardware. We discuss an implementation of a key computationally intensive baseband algorithm for joint ...
  • ASIC Implementation Comparison of SIC and LSD Receivers for MIMO-OFDM 

    Ketonen, Johanna; Myllylä, Markus; Juntti, Markku; Cavallaro, Joseph R. (IEEE, 2008-10-01)
    MIMO-OFDM receivers with horizontal encoding are considered in this paper. The successive interference cancellation (SIC) algorithm is compared to the K-best list sphere detector (LSD). A modification to the K-best LSD ...
  • ASIP Architecture for Future Wireless Systems: Flexibility and Customization 

    Cavallaro, Joseph R.; Radosavljevic, Predrag (2004-06-01)
    Efficiency and flexibility are crucial features of the processors in the next generation of wireless cellular systems. Processors need to be efficient in order to satisfy real-time requirements for very demanding algorithms ...
  • ASIP Architecture Implementation of Channel Equalization Algorithms for MIMO Systems in WCDMA Downlink 

    Radosavljevic, Predrag; Cavallaro, Joseph R.; de Baynast, Alexandre (2004-09-01)
    This paper presents a customized and flexible hardware implementation of linear iterative channel equalization algorithms for WCDMA downlink transmission in 3G wireless system with multiple transmit and receive antennas ...
  • Automated Evaluation of Critical Features in VLSI Layouts Based on Photolithographic Simulations 

    Cavallaro, Joseph R.; Sengupta, Chaitali; Tittel, Frank K.; Wilson, William L. Jr. (SME Press, 1996-01-01)
    This paper describes a CAD tool (An Integrated CAD Framework) which links VLSI layout editors to lithographic simulators and provides information on the simulated resolution of a feature to the circuit designer. The designer ...
  • Automated Evaluation of Critical Features in VLSI Layouts Based on Photolithographic Simulations 

    Sengupta, Chaitali; Cavallaro, Joseph R.; Wilson, William L.; Tittel, Frank K. (IEEE, 1997-11-01)
    In this paper, we address the problem of identifying and evaluating “critical features” in an integrated circuit (IC) layout. The “critical features” (e.g., nested elbows and open ends) are areas in the layout that are ...
  • Baseband Signal Compression in Wireless Base Stations 

    Vosoughi, Aida; Wu, Michael; Cavallaro, Joseph R. (IEEE, 2012-12-01)
    To comply with the evolving wireless standards, base stations must provide greater data rates over the serial data link between base station processor and RF unit. This link is especially important in distributed antenna ...
  • A bit-streaming pipelined multiuser detector for wireless communications 

    Rajagopal, Sridhar; Cavallaro, Joseph R. (2001-05-20)
    This paper presents a bit-streaming, pipelined and reduced complexity architecture to meet real-time requirements for asynchronous multiuser detection in wireless communication CDMA receivers. Typically, asynchronous ...
  • Blind Algorithms for Channel Estimation and Detection in Wireless Handsets 

    Livingston, Frank; Cavallaro, Joseph R. (2000-05-20)
    Multiple access is an important consideration in the design and implementation of wireless communications systems. Code division multiple access (CDMA) is one method for providing multiple access in a wireless system. In ...
  • CAPE - VLSI Implementation of a Systolic Processor Array: Architecture, Design and Testing 

    Hemkumar, Nariankadu D.; Kota, Kishore; Cavallaro, Joseph R. (1991-06-20)
    The SVD is an important matrix decomposition in many real-time signal processing, image processing and robotics applications. Special-purpose processor arrays can achieve significant speed-up over conventioinal architectures ...
  • Chip level LMMSE Equalization for Downlink MIMO CDMA in fast fading environments 

    de Baynast, Alexandre; Radosavljevic, Predrag; Cavallaro, Joseph R. (2004-11-01)
    In this paper, we consider linear MMSE equalization for wireless downlink transmission with multiple transmit and receive antennas in fast fading environment. We propose a new algorithm based on conjugate-gradient algorithm ...
  • CMOS Processor Element For A Fault-Tolerant SVD Array 

    Kota, Kishore; Cavallaro, Joseph R. (1993-07-20)
    This paper describes the VLSI implementation of a CORDIC based processor element for use in a fault-reconfigurable systolic array to compute the Singular Value Decomposition (SVD) of a matrix. The chip implements a time ...
  • Communication Processors 

    Rajagopal, Sridhar; Cavallaro, Joseph R. (Wiley, 2005-07-01)
    Communication processors are processors with specific optimizations to support communication sys-tems. Communication processors exist in a wide variety of forms and can be categorized based on the communication system, ...
  • COMPARISON OF TWO NOVEL LIST SPHERE DETECTOR ALGORITHMS FOR MIMO-OFDM SYSTEMS 

    Myllylä, Markus; Silvola, Pirkka; Juntti, Markku; Cavallaro, Joseph R. (IEEE, 2006-09-01)
    In this paper, the complexity and performance of two novel list sphere detector (LSD) algorithms are studied and evaluated in multiple-input multiple-output orthogonal frequency division multiplexing (MIMO-OFDM) system. ...
  • Compiler Driven Architecture Design Space Exploration for DSP Workloads: A Study in Software Programmability Versus Hardware Acceleration 

    Brogioli, Michael C.; Cavallaro, Joseph R. (IEEE, 2009-11-01)
    Wireless communications and video kernels contain vast instruction and data level parallelism that can far outstrip programmable high performance DSPs. Hardware acceleration of these bottlenecks is commonly done at the ...
  • Complexity Analysis of MMSE Detector Architectures for MIMO OFDM Systems 

    Myllylä, Markus; Hintikka, Juha-Matti; Cavallaro, Joseph R.; Juntti, Markku; Limingoja, Matti; Byman, Aaron (IEEE, 2005-11-01)
    In this paper, a field programmable gate array (FPGA) implementation of a linear minimum mean square error (LMMSE) detector is considered for MIMO-OFDM systems. Two square root free algorithms based on QR decomposition ...
  • Computationally Efficient Multiuser Detectors 

    Das, Suman; Cavallaro, Joseph R.; Aazhang, Behnaam (1997-09-20)
    CDMA is becoming an increasingly popular multiplexing scheme in wireless communications and this has necessitated the development of efficient detection techniques. The exponential complexity of the optimal detector on ...
  • Configurable and Scalable High Throughput Turbo Decoder Architecture for Multiple 4GWireless Standards 

    Sun, Yang; Zhu, Yuming; Goel, Manish; Cavallaro, Joseph R. (IEEE, 2008-07-01)
    In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posteriori) decoder is designed for both binary and ...
  • Configurable and Scalable Turbo Decoder for 4G Wireless Receivers 

    Sun, Yang; Cavallaro, Joseph R.; Zhu, Yuming; Manish, Goel (IGI-Global Press, 2010-01-01)
    The increasing requirements of high data rates and quality of service (QoS) in fourth-generation (4G) wireless communication require the implementation of practical capacity approaching codes. In this chapter, the application ...
  • Configurable LDPC Decoder Architecture for Regular and Irregular Codes 

    Karkooti, Marjan; Radosavljevic, Predrag; Cavallaro, Joseph R. (Springer, 2008-11-01)
    Low Density Parity Check (LDPC) codes are one of the best error correcting codes that enable the future generations of wireless devices to achieve higher data rates with excellent quality of service. This paper presents ...
  • Configurable, High Throughput, Irregular LDPC Decoder Architecture: Tradeoff Analysis and Implementation 

    Karkooti, Marjan; Radosavljevic, Predrag; Cavallaro, Joseph R. (2006-09-01)
    With the current trend of the increase in the data-rate requirements of wireless systems, there will be a huge need to increase their performance by utilizing more sophisticated channel coding algorithms. Low Density ...
  • Cooperative Partial Detection Using MIMO Relays 

    Amiri, Kiarash; Wu, Michael; Cavallaro, Joseph R.; Lilleberg, Jorma (IEEE, 2011-10-01)
    Using multiple-input multiple-output (MIMO) relays in cooperative communication improves the data rate and reliability of the communication. The MIMO transmission, however, requires considerable resources for the detection ...
  • CORDIC Arithmetic for an SVD Processor 

    Cavallaro, Joseph R.; Luk, Franklin T. (The Computer Society of the IEEE, 1987-05-01)
    Arithmetic issues in the calculation of the Singular Value Decomposition (SVD) are discussed. Traditional algorithms using hardware division and square root are replaced with the special purpose CORDIC algorithms for ...
  • CORDIC Arithmetic for an SVD Processor 

    Cavallaro, Joseph R.; Luk, Franklin T. (1988-06-20)
    Arithmetic issues in the calculation of the Singular Value Decomposition (SVD) are discussed. Traditional algorithms using hardware division and square root are replaced with the special purpose CORDIC algorithms for ...
  • A CORDIC Processor Array for the SVD of a Complex Matrix 

    Cavallaro, Joseph R.; Elster, Anne C. (Elsevier Science Publishers, 1991)
    Matrix factorizations are important in many real-time signal processing applications. In order to improve the performance of these algorithms, special-purpose VLSI processor arrays are being developed. Recently, the ...
  • Dataflow Modeling and Design for Cognitive Radio Networks 

    Wang, Lai-Huei; Bhattacharyya, Shuvra S.; Vosoughi, Aida; Cavallaro, Joseph R.; Juntti, Markku; Boutellier, Jani; Silven, Olli; Valkama, Mikko (8th International Conference on Cognitive Radio Oriented Wireless Networks, 2013-10-01)
    Cognitive radio networks present challenges at many levels of design including configuration, control, and crosslayer optimization. In this paper, we focus primarily on dataflow representations to enable flexibility and ...
  • Decision-Directed Channel Estimation Implementation for Spectral Efficiency Improvement in Mobile MIMO-OFDM 

    Ketonen, Johanna; Juntti, Markku; Ylioinas, Jari; Cavallaro, Joseph R. (Springer, 2013-09-30)
    Channel estimation algorithms and their implementations for mobile receivers are considered in this paper. The 3GPP long term evolution (LTE) based pilot structure is used as a benchmark in a multiple-input multiple-o ...
  • Design and Analysis of Heterogeneous DSP/FPGA Based Architectures for 3GPP Wireless Systems 

    Brogioli, Michael C.; Gadhiok, Manik; Cavallaro, Joseph R. (IEEE, 2006-04-01)
    This paper shows how iterative hardware/software partitioning in heterogeneous DSP/FPGA based embedded systems can be utilized to achieve real-time deadlines of modern 3GPP wireless equalization workloads. By utilizing a ...
  • Design and Architecture of Spatial Multiplexing MIMO Decoders for FPGAs 

    Dick, Chris; Amiri, Kiarash; Cavallaro, Joseph R.; Rao, Raghu (IEEE, 2008-10-01)
    Spatial multiplexing multiple-input-multiple-output (MIMO) communication systems have recently drawn significant attention as a means to achieve tremendous gains in wireless system capacity and link reliability. The optimal ...
  • Design space exploration for real-time embedded stream processors 

    Rajagopal, Sridhar; Cavallaro, Joseph R.; Rixner, Scott (2004-07-01)
    We present a design framework for rapidly exploring the design space for stream processors in real-time embedded systems. Stream processors enable hundreds of arithmetic units in programmable pro-cessors by using clusters ...
  • Displacement MIMO Kalman equalizer architecture for CDMA downlink in fast fading channels 

    Guo, Yuanbin; Zhang, Jianzhong (Charlie); McCain, Dennis; Cavallaro, Joseph R. (2005-07-01)
    In this paper, we explore the displacement structure in a Kalman equalizer for MIMO-CDMA downlink. A streamlined MIMO Kalman equalizer architecture is proposed to extract the commonality in the data path by exploiting the ...
  • Displacement MIMO Kalman Equalizer for CDMA Downlink in Fast Fading Channels 

    Guo, Yuanbin; Zhang, Jianzhong (Charlie); McCain, Dennis; Cavallaro, Joseph R. (2005-11-01)
    In this paper, a streamlined MIMO Kalman equalizer architecture is proposed to extract the commonality in the data path by jointly considering the displacement structure of the transition matrix and the block-Toeplitz ...
  • Distorted Channel Capacity: A Geometrical Approach 

    Das, Suman; Cavallaro, Joseph R.; Erkip, Elza; Aazhang, Behnaam (2000-06-20)
    Shannon's capacity result has often been used as a benchmark to compare the performance of practical codes. Shannon's theorem helps us to calculate the maximum rate at which data can be transferred without making any errors. ...
  • Distributed Decoding in Cooperative Communications 

    Karkooti, Marjan; Cavallaro, Joseph R. (IEEE, 2007-11-01)
    In this paper, we present a novel relaying strategy called distributed and partial decoding. This strategy can be viewed as a variation of the decode and forward with the difference that the relay partially decodes the ...
  • DSP architectural considerations for optimal baseband processing 

    Rajagopal, Sridhar; Rixner, Scott; Cavallaro, Joseph R.; Aazhang, Behnaam (2002-08-20)
    The data rate requirements for future wireless systems has increased by orders-of-magnitude (from Kbps to several Mbps), requiring more sophisticated algorithms for their implementation. This tutorial will explore different ...
  • Dynamic Fault Reconfigurable Intelligent Control Architectures for Robotics 

    Cavallaro, Joseph R.; Walker, Ian D. (American Nuclear Society, 1993-04-01)
    In this paper we describe new progress in our development of an Intelligent Control Framework for robots which dynamically reconfigures itself to cope with faults in either sensors or joint hardware. The Framework is ...
  • A Dynamic Fault Tolerance Framework for Remote Robots 

    Visinsky, Monica L.; Cavallaro, Joseph R.; Walker, Ian D. (IEEE, 1995-08-01)
    Fault tolerance is increasingly important for robots, especially those in remote or hazardous environments. Robots need the ability to effectively detect and tolerate internal failures in order to continue performing their ...
  • Dynamic Senor-Based Fault Detection for Robots 

    Visinsky, Monica L.; Cavallaro, Joseph R.; Walker, Ian D. (SPIE - The International Society for Optical Engineering, 1993-09-01)
    Fault detection and fault tolerance are increasingly important for robots in space or hazardous environments due to the dangerous and often inaccessible nature of these environs. We have previously developed algorithms to ...
  • Effcient Implementation of Rotation Operations for High Performance QRD-RLS Filtering 

    Haller, Bruno; Gӧtze, Jürgen; Cavallaro, Joseph R. (1997-07-20)
    In this contribution we present practical techniques for implementing Givens rotations based on the well-known CORDIC algorithm. Rotations are the basic operation in many high performance adaptive filtering schemes as well ...
  • The effect of LLR clipping to the complexity of list sphere detector algorithms 

    Myllylä, Markus; Antikainen, Juho; Juntti, Markku; Cavallaro, Joseph R. (IEEE, 2007-11-01)
    The optimal detection for coded system requires the use of a maximum a posteriori (MAP) detection. A list sphere detector (LSD) can be used to approximate the MAP detector. Depending on the used list size, LSD provides a ...
  • The Effect of Preprocessing to the Complexity of List Sphere Detector Algorithms 

    Myllylä, Markus; Juntti, Markku; Cavallaro, Joseph R. (WPMC, 2008-09-01)
    A list sphere detector (LSD) is an enhancement of a sphere detector (SD) that can be used to approximate the soft output MAP detector used in the detection of the multiple-input multiple-output (MIMO) signals. The LSD ...
  • An Efficient Circulant MIMO Equalizer for CDMA Downlink: Algorithm and VLSI Architecture 

    Guo, Yuanbin; Zhang, Jianzhong (Charlie); McCain, Dennis; Cavallaro, Joseph R. (2005-12-01)
    In this paper, we present an efficient circulant approximation based MIMO equalizer architecture for the CDMA downlink. This reduces the Direct-Matrix-Inverse (DMI) of size (NF x NF) with O((NF)³) complexity to some ...
  • An Efficient Circulant MIMO Equalizer for CDMA Downlink: Algorithm and VLSI Architecture 

    Guo, Yuanbin; Zhang, Jianzhong; McCain, Dennis; Cavallaro, Joseph R. (Hindawi Publishing Corporation, 2006-02-01)
    We present an efficient circulant approximation-based MIMO equalizer architecture for the CDMA downlink. This reduces the direct matrix inverse (DMI) of size (NF×NF) with O((NF)3) complexity to some FFT operations with ...
  • Efficient Complex Matrix Transformations with CORDIC 

    Hemkumar, Nariankadu D.; Cavallaro, Joseph R. (1993-06-20)
    Transformations of real and arbitrary 2 x 2 matrices are employed in parallel algorithms based on Jacobi-like precedures for matrix factorizations like the eigenvalue and the singular value decompositions. Cast in the ...
  • Efficient hardware implementation of a highly-parallel 3GPP LTE/LTE-advance turbo decoder 

    Sun, Yang; Cavallaro, Joseph R. (Elsevier, 2011-09-01)
    We present an efficient VLSI architecture for 3GPP LTE/LTE-Advance Turbo decoder by utilizing the algebraic-geometric properties of the quadratic permutation polynomial (QPP) interleaver. The high throughput 3GPP LTE/LTE-Advance ...
  • Efficient MIMO equalization for downlink multi-code CDMA: complexity optimization and comparative study 

    Guo, Yuanbin; Zhang, Jianzhong (Charlie); McCain, Dennis; Cavallaro, Joseph R. (2004-11-01)
    In this paper, we present an efficient LMMSE chip equalizer to suppress the interference caused by the multipath fading channel in the MIMO multi-code CDMA downlink. The block-Toeplitz structure in the correlation matrix ...
  • Efficient Multiuser Receivers for CDMA Systems 

    Sengupta, Chaitali; Das, Suman; Cavallaro, Joseph R.; Aazhang, Behnaam (1999-09-20)
    We focus on the design of multiuser receiver structures for Code Division Multiple Access (CDMA) communication systems, in the presence of multipath elects and multiple sensors at the base station receiver. We present a ...
  • Efficient VLSI Architectures for Baseband Signal Processing for Wireless Base-Station Receivers 

    Rajagopal, Sridhar; Bhashyam, Srikrishna; Cavallaro, Joseph R.; Aazhang, Behnaam (2000-07-20)
    A real-time VLSI architecture is designed for multiuser channel estimation, one of the core base-band processing operations in wireless base-station receivers. Future wireless basestation receivers will need to use ...