Now showing items 21-40 of 252

  • Blind Algorithms for Channel Estimation and Detection in Wireless Handsets 

    Livingston, Frank; Cavallaro, Joseph R. (2000-05-20)
    Multiple access is an important consideration in the design and implementation of wireless communications systems. Code division multiple access (CDMA) is one method for providing multiple access in a wireless system. In ...
  • CAPE - VLSI Implementation of a Systolic Processor Array: Architecture, Design and Testing 

    Hemkumar, Nariankadu D.; Kota, Kishore; Cavallaro, Joseph R. (1991-06-20)
    The SVD is an important matrix decomposition in many real-time signal processing, image processing and robotics applications. Special-purpose processor arrays can achieve significant speed-up over conventioinal architectures ...
  • Chip level LMMSE Equalization for Downlink MIMO CDMA in fast fading environments 

    de Baynast, Alexandre; Radosavljevic, Predrag; Cavallaro, Joseph R. (2004-11-01)
    In this paper, we consider linear MMSE equalization for wireless downlink transmission with multiple transmit and receive antennas in fast fading environment. We propose a new algorithm based on conjugate-gradient algorithm ...
  • CMOS Processor Element For A Fault-Tolerant SVD Array 

    Kota, Kishore; Cavallaro, Joseph R. (1993-07-20)
    This paper describes the VLSI implementation of a CORDIC based processor element for use in a fault-reconfigurable systolic array to compute the Singular Value Decomposition (SVD) of a matrix. The chip implements a time ...
  • Communication Processors 

    Rajagopal, Sridhar; Cavallaro, Joseph R. (Wiley, 2005-07-01)
    Communication processors are processors with specific optimizations to support communication sys-tems. Communication processors exist in a wide variety of forms and can be categorized based on the communication system, ...
  • COMPARISON OF TWO NOVEL LIST SPHERE DETECTOR ALGORITHMS FOR MIMO-OFDM SYSTEMS 

    Myllylä, Markus; Silvola, Pirkka; Juntti, Markku; Cavallaro, Joseph R. (IEEE, 2006-09-01)
    In this paper, the complexity and performance of two novel list sphere detector (LSD) algorithms are studied and evaluated in multiple-input multiple-output orthogonal frequency division multiplexing (MIMO-OFDM) system. ...
  • Compiler Driven Architecture Design Space Exploration for DSP Workloads: A Study in Software Programmability Versus Hardware Acceleration 

    Brogioli, Michael C.; Cavallaro, Joseph R. (IEEE, 2009-11-01)
    Wireless communications and video kernels contain vast instruction and data level parallelism that can far outstrip programmable high performance DSPs. Hardware acceleration of these bottlenecks is commonly done at the ...
  • Complexity Analysis of MMSE Detector Architectures for MIMO OFDM Systems 

    Myllylä, Markus; Hintikka, Juha-Matti; Cavallaro, Joseph R.; Juntti, Markku; Limingoja, Matti; Byman, Aaron (IEEE, 2005-11-01)
    In this paper, a field programmable gate array (FPGA) implementation of a linear minimum mean square error (LMMSE) detector is considered for MIMO-OFDM systems. Two square root free algorithms based on QR decomposition ...
  • Computationally Efficient Multiuser Detectors 

    Das, Suman; Cavallaro, Joseph R.; Aazhang, Behnaam (1997-09-20)
    CDMA is becoming an increasingly popular multiplexing scheme in wireless communications and this has necessitated the development of efficient detection techniques. The exponential complexity of the optimal detector on ...
  • Configurable and Scalable High Throughput Turbo Decoder Architecture for Multiple 4GWireless Standards 

    Sun, Yang; Zhu, Yuming; Goel, Manish; Cavallaro, Joseph R. (IEEE, 2008-07-01)
    In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posteriori) decoder is designed for both binary and ...
  • Configurable and Scalable Turbo Decoder for 4G Wireless Receivers 

    Sun, Yang; Cavallaro, Joseph R.; Zhu, Yuming; Manish, Goel (IGI-Global Press, 2010-01-01)
    The increasing requirements of high data rates and quality of service (QoS) in fourth-generation (4G) wireless communication require the implementation of practical capacity approaching codes. In this chapter, the application ...
  • Configurable LDPC Decoder Architecture for Regular and Irregular Codes 

    Karkooti, Marjan; Radosavljevic, Predrag; Cavallaro, Joseph R. (Springer, 2008-11-01)
    Low Density Parity Check (LDPC) codes are one of the best error correcting codes that enable the future generations of wireless devices to achieve higher data rates with excellent quality of service. This paper presents ...
  • Configurable, High Throughput, Irregular LDPC Decoder Architecture: Tradeoff Analysis and Implementation 

    Karkooti, Marjan; Radosavljevic, Predrag; Cavallaro, Joseph R. (2006-09-01)
    With the current trend of the increase in the data-rate requirements of wireless systems, there will be a huge need to increase their performance by utilizing more sophisticated channel coding algorithms. Low Density ...
  • Cooperative Partial Detection Using MIMO Relays 

    Amiri, Kiarash; Wu, Michael; Cavallaro, Joseph R.; Lilleberg, Jorma (IEEE, 2011-10-01)
    Using multiple-input multiple-output (MIMO) relays in cooperative communication improves the data rate and reliability of the communication. The MIMO transmission, however, requires considerable resources for the detection ...
  • CORDIC Arithmetic for an SVD Processor 

    Cavallaro, Joseph R.; Luk, Franklin T. (The Computer Society of the IEEE, 1987-05-01)
    Arithmetic issues in the calculation of the Singular Value Decomposition (SVD) are discussed. Traditional algorithms using hardware division and square root are replaced with the special purpose CORDIC algorithms for ...
  • CORDIC Arithmetic for an SVD Processor 

    Cavallaro, Joseph R.; Luk, Franklin T. (1988-06-20)
    Arithmetic issues in the calculation of the Singular Value Decomposition (SVD) are discussed. Traditional algorithms using hardware division and square root are replaced with the special purpose CORDIC algorithms for ...
  • A CORDIC Processor Array for the SVD of a Complex Matrix 

    Cavallaro, Joseph R.; Elster, Anne C. (Elsevier Science Publishers, 1991)
    Matrix factorizations are important in many real-time signal processing applications. In order to improve the performance of these algorithms, special-purpose VLSI processor arrays are being developed. Recently, the ...
  • Dataflow Modeling and Design for Cognitive Radio Networks 

    Wang, Lai-Huei; Bhattacharyya, Shuvra S.; Vosoughi, Aida; Cavallaro, Joseph R.; Juntti, Markku; Boutellier, Jani; Silven, Olli; Valkama, Mikko (8th International Conference on Cognitive Radio Oriented Wireless Networks, 2013-10-01)
    Cognitive radio networks present challenges at many levels of design including configuration, control, and crosslayer optimization. In this paper, we focus primarily on dataflow representations to enable flexibility and ...
  • Decision-Directed Channel Estimation Implementation for Spectral Efficiency Improvement in Mobile MIMO-OFDM 

    Ketonen, Johanna; Juntti, Markku; Ylioinas, Jari; Cavallaro, Joseph R. (Springer, 2013-09-30)
    Channel estimation algorithms and their implementations for mobile receivers are considered in this paper. The 3GPP long term evolution (LTE) based pilot structure is used as a benchmark in a multiple-input multiple-o ...
  • Design and Analysis of Heterogeneous DSP/FPGA Based Architectures for 3GPP Wireless Systems 

    Brogioli, Michael C.; Gadhiok, Manik; Cavallaro, Joseph R. (IEEE, 2006-04-01)
    This paper shows how iterative hardware/software partitioning in heterogeneous DSP/FPGA based embedded systems can be utilized to achieve real-time deadlines of modern 3GPP wireless equalization workloads. By utilizing a ...