Now showing items 1-6 of 6
Efficient simulation of simple instruction set array processors
Simple instruction set array processors are groups of regularly connected processors with small instruction sets and local memories. The processors are augmented by built-in communication instructions. Because of the ...
Efficient simulation and utilization of a parallel digital signal processing architecture
In this study we discuss the development and validation of an efficient and accurate execution-driven simulation of the Texas Instruments Odyssey System, a parallel configuration of digital signal processors. We also ...
Modeling process scheduling and system software in multiprocessors
This thesis presents new techniques for simulating multiprogramming and interrupt servicing in an execution driven simulation environment. We have incorporated these techniques into the Rice Parallel Processing Testbed ...
Efficient methods for cache performance prediction
The goal of our work is to develop techniques that accurately and efficiently simulate the behavior of computer systems with cache memories. This thesis describes the design, analysis, and validation of three such methods ...
Performance prediction of packet switched multistage interconnection networks in an execution-driven environment
This thesis studies the performance of multistage interconnection networks (MINs) using execution-driven simulation. The networks were studied with varying network configurations, numbers of inputs and outputs of the network ...
Validation of the Rice Parallel Processing Testbed using sorting algorithms (Rice University, Texas)
The Rice Parallel Processing Testbed (RPPT) is software package for simulating the execution of parallel computers. The RPPT employs execution driven simulation to perform simulation efficiently. In this thesis, the ...