Optimal Matrix Multiplication on Fault Tolerant VLSI Arrays
Varman, Peter J.
A fault-tolerant array for matrix multiplication that explicitly incorporates mechanisms for easy testability and reconfigurability is described. All signals in the array travel only a constant distance (independent of array size) in any clock cycle. An optimal-time algorithm, designed for multiplying matrices, is described. The algorithm is an efficient simulation of a 2-D systolic algorithm for multiplying matrices.
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- ECE Publications