Telecommunications and multimedia form a vast segment of the embedded systems market. Variations in standards coupled with the desire for software programmability often result in software based implementations executing on DSP cores. With the advent of data intensive media and communications workloads, computational demands of the DSP are ever ...

In order to curb microprocessor power consumption, we propose an L1 data cache which can be reconfigured dynamically at runtime according to the cache requirements of a given application. A two phase approach is used involving both compile time information, and the runtime monitoring of program performance. The compiler predicts L1 data cache ...