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dc.contributor.authorRostami, Masoud
Mohanram, Kartik
dc.date.accessioned 2013-09-18T17:03:26Z
dc.date.available 2013-09-18T17:03:26Z
dc.date.issued 2011-03
dc.identifier.citation M. Rostami and K. Mohanram, "Dual-Vth Independent-Gate FinFETs for Low Power Logic Circuits," IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 30, no. 3, 2011.
dc.identifier.urihttps://hdl.handle.net/1911/72088
dc.description.abstract This paper describes the electrode work-function, oxide thickness, gate-source/drain underlap, and silicon thickness optimization required to realize dual-Vth independent-gate FinFETs. Optimum values for these FinFET design parameters are derived using the physics-based University of Florida SPICE model for double-gate devices, and the optimized FinFETs are simulated and validated using Sentaurus TCAD simulations. Dual-Vth FinFETs with independent gates enable series and parallel merge transformations in logic gates, realizing compact low power alternative gates with competitive performance and reduced input capacitance in comparison to conventional FinFET gates. Furthermore, they also enable the design of a new class of compact logic gates with higher expressive power and flexibility than conventional CMOS gates, e.g., implementing 12 unique Boolean functions using only four transistors. Circuit designs that balance and improve the performance of the novel gates are described. The gates are designed and calibrated using the University of Florida double-gate model into conventional and enhanced technology libraries. Synthesis results for 16 benchmark circuits from the ISCAS and OpenSPARC suites indicate that on average at 2GHz, the enhanced library reduces total power and the number of fins by 36% and 37%, respectively, over a conventional library designed using shorted-gate FinFETs in 32 nm technology.
dc.language.iso eng
dc.publisher IEEE
dc.subjectDouble-gate
dual-Vth
FinFET
low power design
technology mapping
transistor
dc.title Dual-Vth Independent-Gate FinFETs for Low Power Logic Circuits
dc.type Journal article
dc.citation.journalTitle IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
dc.citation.volumeNumber 30
dc.citation.issueNumber 3
dc.type.dcmi Text
dc.type.dcmi Text
dc.identifier.doihttp://dx.doi.org/10.1109/TCAD.2010.2097310
dc.citation.firstpage 337
dc.citation.lastpage 349


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    Publications by Rice University Electrical and Computer Engineering faculty and graduate students

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