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    Coding for Phase Change Memory Performance Optimization

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    Author
    Mirhoseini, Azalia
    Date
    2012-09-05
    Advisor
    Koushanfar, Farinaz
    Degree
    Master of Science
    Abstract
    Over the past several decades, memory technologies have exploited continual scaling of CMOS to drastically improve performance and cost. Unfortunately, charge-based memories become unreliable beyond 20 nm feature sizes. A promising alternative is Phase-Change-Memory (PCM) which leverages scalable resistive thermal mechanisms. To realize PCM's potential, a number of challenges, including the limited wear-endurance and costly writes, need to be addressed. This thesis introduces novel methodologies for encoding data on PCM which exploit asymmetries in read/write performance to minimize memory's wear/energy consumption. First, we map the problem to a distance-based graph clustering problem and prove it is NP-hard. Next, we propose two different approaches: an optimal solution based on Integer-Linear-Programming, and an approximately-optimal solution based on Dynamic-Programming. Our methods target both single-level and multi-level cell PCM and provide further optimizations for stochastically-distributed data. We devise a low overhead hardware architecture for the encoder. Evaluations demonstrate significant performance gains of our framework.
    Keyword
    Phase change memory; Coding; Energy optimization
    Citation
    Mirhoseini, Azalia. "Coding for Phase Change Memory Performance Optimization." (2012) Master’s Thesis, Rice University. https://hdl.handle.net/1911/64682.
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    • ECE Theses and Dissertations [597]
    • Rice University Electronic Theses and Dissertations [13409]

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    Home | FAQ | Contact Us | Privacy Notice | Accessibility Statement
    Managed by the Digital Scholarship Services at Fondren Library, Rice University
    Physical Address: 6100 Main Street, Houston, Texas 77005
    Mailing Address: MS-44, P.O.BOX 1892, Houston, Texas 77251-1892
    Site Map