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dc.contributor.authorSun, Yang
Amiri, Kiarash
Wang, Guohui
Yin, Bei
Cavallaro, Joseph R.
Ly, Tai 2012-07-26T15:33:44Z 2012-07-26T15:33:44Z 2012-07-12
dc.description.abstract High-level synthesis design methodology - High level synthesis (HLS) [1], also known as behavioral synthesis and algorithmic synthesis, is a design process in which a high level, functional description of a design is automatically compiled into a RTL implementation that meets certain user specified design constraints. The HLS design description is ‘high level’ compared to RTL in two aspects: design abstraction, and specification language.
dc.language.iso eng
dc.publisher Elsevier, Waltham, MA
dc.title High-Level Design Tools for Complex DSP Applications
dc.type Book chapter Center for Multimedia Communication
dc.citation.volumeNumber Chapter 8
dc.type.dcmi Text
dc.type.dcmi Text
dc.citation.firstpage 133
dc.citation.lastpage 155
dc.identifier.citation Y. Sun, K. Amiri, G. Wang, B. Yin, J. R. Cavallaro and T. Ly, "High-Level Design Tools for Complex DSP Applications," vol. Chapter 8, 2012.

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  • ECE Publications [1093]
    Publications by Rice University Electrical and Computer Engineering faculty and graduate students
  • CMC Publications [268]
    Publications by Rice Faculty and graduate students in multimedia communications

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