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dc.contributor.authorBrogioli, Michael C.
Gadhiok, Manik
Cavallaro, Joseph R. 2012-06-14T19:38:31Z 2012-06-14T19:38:31Z 2006-04-01
dc.description.abstract This paper shows how iterative hardware/software partitioning in heterogeneous DSP/FPGA based embedded systems can be utilized to achieve real-time deadlines of modern 3GPP wireless equalization workloads. By utilizing a well defined set of application partitioning criteria in tandem with SOC simulation tools, we are able to show a greater than six fold improvement in application performance and ultimately meet, and even exceed real-time data processing deadlines.
dc.language.iso eng
dc.publisher IEEE
dc.subjectReal time systems
Embedded systems
System partitioning
Wireless applications
dc.title Design and Analysis of Heterogeneous DSP/FPGA Based Architectures for 3GPP Wireless Systems
dc.type Conference paper Center for Multimedia Communication
dc.citation.conferenceName IEEE Real-Time and Embedded Technology and Applications Symposium; Work in Progress Session
dc.citation.conferenceDate 2006
dc.type.dcmi Text
dc.type.dcmi Text
dc.citation.firstpage 29
dc.citation.lastpage 32
dc.identifier.citation M. C. Brogioli, M. Gadhiok and J. R. Cavallaro, "Design and Analysis of Heterogeneous DSP/FPGA Based Architectures for 3GPP Wireless Systems," 2006.

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  • CMC Publications [268]
    Publications by Rice Faculty and graduate students in multimedia communications
  • ECE Publications [1289]
    Publications by Rice University Electrical and Computer Engineering faculty and graduate students

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