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dc.contributor.authorBrogioli, Michael
Cavallaro, Joseph R. 2012-06-14T18:27:25Z 2012-06-14T18:27:25Z 2005-11-01
dc.identifier.citation M. Brogioli and J. R. Cavallaro, "Modelling Heterogeneous DSP–FPGA Based System Partitioning with Extensions to the Spinach Simulation Environment," 2005.
dc.description.abstract In this paper we present system-on-a-chip extensions to the Spinach simulation environment for rapidly prototyping heterogeneous DSP/FPGA based architectures, specifically in the embedded domain. This infrastructure has been successfully used to model systems varying from multiprocessor gigabit ethernet controllers to Texas Instruments C6x series DSP based systems with tightly coupled FPGA based coprocessors for computational offloading. As an illustrative example of this toolsets functionality, we investigate workload partitioning in heterogeneous DSP/FPGA based embedded environments. Specifically, we focus on computational offloading of matrix multiplication kernels across DSP/FPGA based embedded architectures.
dc.language.iso eng
dc.publisher IEEE
Rapid prototyping
Matrix multiplication kernels
dc.title Modelling Heterogeneous DSP–FPGA Based System Partitioning with Extensions to the Spinach Simulation Environment
dc.type Conference paper Center for Multimedia Communication
dc.citation.location Pacific Grove, CA
dc.citation.conferenceName 39th Asilomar Conference on Signals, Systems and Computers
dc.citation.conferenceDate 2005
dc.type.dcmi Text
dc.type.dcmi Text
dc.citation.firstpage 1630
dc.citation.lastpage 1634

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  • ECE Publications [1450]
    Publications by Rice University Electrical and Computer Engineering faculty and graduate students
  • Rice Wireless [268]
    Publications by Rice Faculty and graduate students in the Rice Wireless group

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