Now showing items 1-2 of 2

  • HIGH THROUGHPUT, PARALLEL, SCALABLE LDPC ENCODER/DECODER ARCHITECTURE FOR OFDM SYSTEMS 

    Sun, Yang; Karkooti, Marjan; Cavallaro, Joseph R. (2006-10-01)
    This paper presents a high throughput, parallel, scalable and irregular LDPC coding and decoding system hardware implementation that supports twelve combinations of block lengths 648, 1296, 1944 bits and code rates 1/2, ...
  • UNIFIED DECODER ARCHITECTURE FOR LDPC/TURBO CODES 

    Sun, Yang; Cavallaro, Joseph R. (2008-10-01)
    Low-density parity-check (LDPC) codes on par with convolutional turbo codes (CTC) are two of the most powerful error correction codes known to perform very close to the Shannon limit. However, their different code structures ...