Now showing items 14-33 of 268

  • Architectures for Cognitive Radio Testbeds and Demonstrators – An Overview 

    Gustafsson, Oscar; Amiri, Kiarash; Andersson, Dennis; Blad, Anton; Bonner, Christian; Cavallaro, Joseph R.; Declerck, Jeroen; Dejonghe, Antoine; Eliardsson, Patrik; Glasse, Miguel; Hayar, Aawatif; Hollevoet, Lieven; Hunter, Chris; Joshi, Madhura; Kaltenberger, Florian; Knopp, Raymond; Le, Khanh; Miljanic, Zoran; Murphy, Patrick; Naessens, Frederik; Nikaein, Navid; Nussbaum, Dominique; Pacalet, Renaud; Raghavan, Praveen; Sabharwal, Ashutosh; Sarode, Onkar; Spasojevic, Predrag; Sun, Yang; Tullberg, Hugo M.; Vander Aa, Tom; Van der Perre, Liesbet; Wetterwald, Michelle; Wu, Michael (2010-06-01)
    Wireless communication standards are developed at an ever-increasing rate of pace, and significant amounts of effort is put into research for new communication methods and concepts. On the physical layer, such topics include ...
  • Architectures for Heterogeneous Multi-Tier Networks 

    Cavallaro, Joseph R. (2002-01-15)
    Next-generation wireless computing platforms will contain flexible communications capabilites. At Rice University, the Rice Everywhere NEtwork (RENE) project is investigating a multi-standard, multi-tier integration of ...
  • Arithmetic Acceleration Techniques for Wireless Communication Receivers 

    Das, Suman; Rajagopal, Sridhar; Sengupta, Chaitali; Cavallaro, Joseph R. (1999-10-20)
    We develop techniques to accelerate the implementation of the next generation wireless communication algorithms in hardware. We discuss an implementation of a key computationally intensive baseband algorithm for joint ...
  • ASIC Implementation Comparison of SIC and LSD Receivers for MIMO-OFDM 

    Ketonen, Johanna; Myllylä, Markus; Juntti, Markku; Cavallaro, Joseph R. (2008-10-01)
    MIMO-OFDM receivers with horizontal encoding are considered in this paper. The successive interference cancellation (SIC) algorithm is compared to the K-best list sphere detector (LSD). A modification to the K-best LSD ...
  • Automated Evaluation of Critical Features in VLSI Layouts Based on Photolithographic Simulations 

    Cavallaro, Joseph R.; Sengupta, Chaitali; Tittel, Frank K.; Wilson, William L. Jr. (1996-01-01)
    This paper describes a CAD tool (An Integrated CAD Framework) which links VLSI layout editors to lithographic simulators and provides information on the simulated resolution of a feature to the circuit designer. The designer ...
  • Automated Evaluation of Critical Features in VLSI Layouts Based on Photolithographic Simulations 

    Sengupta, Chaitali; Cavallaro, Joseph R.; Wilson, William L.; Tittel, Frank K. (1997-11-01)
    In this paper, we address the problem of identifying and evaluating “critical features” in an integrated circuit (IC) layout. The “critical features” (e.g., nested elbows and open ends) are areas in the layout that are ...
  • Baseband Architecture Design for Future Wireless Base-Station Receivers 

    Rajagopal, Sridhar (2000-05-20)
    This thesis demonstrates designing efficient algorithms and architectures to meet the real-time requirements of future wireless base-station receivers. Next generation receivers require orders-of-magnitude performance ...
  • A bit-streaming pipelined multiuser detector for wireless communications 

    Rajagopal, Sridhar; Cavallaro, Joseph R. (2001-05-20)
    This paper presents a bit-streaming, pipelined and reduced complexity architecture to meet real-time requirements for asynchronous multiuser detection in wireless communication CDMA receivers. Typically, asynchronous ...
  • Coding-Spreading Tradeoff for Lattice Codes 

    Khoshnevis, Ahmad (2001-04-20)
    A fixed bandwidth expansion can be achieved either by coding or spreading, while each have different effect on the resultant signal space. Coding increases both Shannon and Fourier bandwidth whereas spreading only increases ...
  • Communication Processors 

    Rajagopal, Sridhar; Cavallaro, Joseph R. (2005-07-01)
    Communication processors are processors with specific optimizations to support communication sys-tems. Communication processors exist in a wide variety of forms and can be categorized based on the communication system, ...
  • Compact Hardware Accelerator for Functional Verification and Rapid Prototyping of 4G Wireless Communication Systems 

    Guo, Yuanbin; McCain, Dennis (2004-11-01)
    In this paper, we propose an FPGA-based hardware accelerator platform with Xilinx Virtex-II V3000 in a compact PCMCIA form factor. By partitioning the complex algorithms in the 4G simulator to the hardware accelerator, ...
  • COMPARISON OF TWO NOVEL LIST SPHERE DETECTOR ALGORITHMS FOR MIMO-OFDM SYSTEMS 

    Myllylä, Markus; Silvola, Pirkka; Juntti, Markku; Cavallaro, Joseph R. (2006-09-01)
    In this paper, the complexity and performance of two novel list sphere detector (LSD) algorithms are studied and evaluated in multiple-input multiple-output orthogonal frequency division multiplexing (MIMO-OFDM) system. ...
  • Compiler Driven Architecture Design Space Exploration for DSP Workloads: A Study in Software Programmability Versus Hardware Acceleration 

    Brogioli, Michael C.; Cavallaro, Joseph R. (2009-11-01)
    Wireless communications and video kernels contain vast instruction and data level parallelism that can far outstrip programmable high performance DSPs. Hardware acceleration of these bottlenecks is commonly done at the ...
  • Complexity Analysis of MMSE Detector Architectures for MIMO OFDM Systems 

    Myllylä, Markus; Hintikka, Juha-Matti; Cavallaro, Joseph R.; Juntti, Markku; Limingoja, Matti; Byman, Aaron (2005-11-01)
    In this paper, a field programmable gate array (FPGA) implementation of a linear minimum mean square error (LMMSE) detector is considered for MIMO-OFDM systems. Two square root free algorithms based on QR decomposition ...
  • Configurable and Scalable High Throughput Turbo Decoder Architecture for Multiple 4GWireless Standards 

    Sun, Yang; Zhu, Yuming; Goel, Manish; Cavallaro, Joseph R. (2008-07-01)
    In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posteriori) decoder is designed for both binary and ...
  • Configurable and Scalable Turbo Decoder for 4G Wireless Receivers 

    Sun, Yang; Cavallaro, Joseph R.; Zhu, Yuming; Manish, Goel (2010-01-01)
    The increasing requirements of high data rates and quality of service (QoS) in fourth-generation (4G) wireless communication require the implementation of practical capacity approaching codes. In this chapter, the application ...
  • Configurable LDPC Decoder Architecture for Regular and Irregular Codes 

    Karkooti, Marjan; Radosavljevic, Predrag; Cavallaro, Joseph R. (2008-11-01)
    Low Density Parity Check (LDPC) codes are one of the best error correcting codes that enable the future generations of wireless devices to achieve higher data rates with excellent quality of service. This paper presents ...
  • Cooperative Partial Detection Using MIMO Relays 

    Amiri, Kiarash; Wu, Michael; Cavallaro, Joseph R.; Lilleberg, Jorma (2011-10-01)
    Using multiple-input multiple-output (MIMO) relays in cooperative communication improves the data rate and reliability of the communication. The MIMO transmission, however, requires considerable resources for the detection ...
  • CORDIC Arithmetic for an SVD Processor 

    Cavallaro, Joseph R.; Luk, Franklin T. (1988-06-20)
    Arithmetic issues in the calculation of the Singular Value Decomposition (SVD) are discussed. Traditional algorithms using hardware division and square root are replaced with the special purpose CORDIC algorithms for ...
  • CORDIC Arithmetic for an SVD Processor 

    Cavallaro, Joseph R.; Luk, Franklin T. (1987-05-01)
    Arithmetic issues in the calculation of the Singular Value Decomposition (SVD) are discussed. Traditional algorithms using hardware division and square root are replaced with the special purpose CORDIC algorithms for ...