Show simple item record

dc.contributor.authorMurphy, Patrick
Welsh, Erik
Frantz, Patrick
Hardy, Ricky
Mohsenin, Tinoosh
Cavallaro, Joseph R.
dc.creatorMurphy, Patrick
Welsh, Erik
Frantz, Patrick
Hardy, Ricky
Mohsenin, Tinoosh
Cavallaro, Joseph R.
dc.date.accessioned 2007-10-31T00:54:38Z
dc.date.available 2007-10-31T00:54:38Z
dc.date.issued 2003-06-01
dc.date.submitted 2003-06-01
dc.identifier.urihttp://hdl.handle.net/1911/20123
dc.description Conference Paper
dc.description.abstract This paper describes VALID, a platform for testing student designed ASICs and for teaching the basics of FPGA design. VALID is designed to maximize ease of use from a student?s perspective while maintaining enough flexibility for its use as an FPGA development and instruction platform. This system was designed entirely by students, has been successfully manufactured and is currently being used in a number of courses at Rice.
dc.language.iso eng
dc.subjectasic
fpga
valid
dc.title VALID: Custom ASIC Verification and FPGA Education Platform
dc.type Conference paper
dc.date.note 2003-01-27
dc.citation.bibtexName inproceedings
dc.date.modified 2004-02-18
dc.contributor.orgCenter for Multimedia Communications (http://cmc.rice.edu/)
dc.subject.keywordasic
fpga
valid
dc.citation.pageNumber 66-67
dc.citation.location Anaheim, CA
dc.citation.conferenceName International Conference on Microelectronic Systems Education (MSE)
dc.type.dcmi Text
dc.identifier.citation P. Murphy, E. Welsh, P. Frantz, R. Hardy, T. Mohsenin and J. R. Cavallaro, "VALID: Custom ASIC Verification and FPGA Education Platform," pp. 66-67, 2003.


Files in this item

Thumbnail

This item appears in the following Collection(s)

  • ECE Publications [1063]
    Publications by Rice University Electrical and Computer Engineering faculty and graduate students

Show simple item record