Structured Iterative and Circulant MIMO Chip Equalizer Architectures with FFT-acceleration for CDMA Systems
Cavallaro, Joseph R.
In this paper, we propose a class of novel structured linear MMSE chip equalizer architectures for the MIMO CDMA systems using FFT-accelerations. First, a Conjugate Gradient (CG) algorithm is applied to avoid the Direct Matrix Inverse (DMI), which has O((NF)^3) complexity. By utilizing a revered form block-Toeplitz structure, the matrix multiplication in the CG iteration is accelerated by an equivalent frequencydomain FFT-based â overlap-saveâ architecture. The iteration rapidly refines a crude initial approximation to the actual final equalizer taps and significantly reduces complexity from O((NF)^2) to O(NF log2(F)). Secondly, we propose a circulant architecture which also utilizes FFT-based acceleration by approximating the DMI with a block-circulant structure. An extensive comparative analysis in performance, numerical stability and complexity demonstrates promising performance/complexity tradeoff, especially for very long channels. Both algorithms not only reduce the complexity dramatically, but also provide unified parallel and pipelined structures, which is essential for practical real-time VLSI implementation of MIMO systems.