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    Compact Hardware Accelerator for Functional Verification and Rapid Prototyping of 4G Wireless Communication Systems

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    Author
    Guo, Yuanbin; McCain, Dennis
    Date
    2005-12-05
    Abstract
    In this paper, we propose an FPGA-based hardware accelerator platform with Xilinx Virtex-II V3000 in a compact PCMCIA form factor. By partitioning the complex algorithms in the 4G simulator to the hardware accelerator, we apply an efficient Catapult-C methodology to quickly evaluate the area/speed tradeoffs and rapidly schedule synthesizable RTL models for implementation. The simulation time is accelerated by 100£ for a QRD-M algorithm. This not only enables much faster verification in the 4G standard environment, but also provides software/hardware co-design and rapid prototyping of the core algorithm in a realistic fixed-point platform.
    Description
    Conference paper
    Citation
    Y. Guo and D. McCain, "Compact Hardware Accelerator for Functional Verification and Rapid Prototyping of 4G Wireless Communication Systems," 2004.
    Published Version
    http://dx.doi.org/10.1109/ACSSC.2004.1399239
    Keyword
    hardware; 4G; functional verification; rapid prototyping; hardware; More... 4G; functional verification; rapid prototyping Less...
    Type
    Conference paper
    Citable link to this page
    https://hdl.handle.net/1911/19927
    Metadata
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    • ECE Publications [1468]
    • Rice Wireless [268]

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    Managed by the Digital Scholarship Services at Fondren Library, Rice University
    Physical Address: 6100 Main Street, Houston, Texas 77005
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    Site Map