Compact Hardware Accelerator for Functional Verification and Rapid Prototyping of 4G Wireless Communication Systems
Author
Guo, Yuanbin; McCain, Dennis
Date
2005-12-05Abstract
In this paper, we propose an FPGA-based hardware
accelerator platform with Xilinx Virtex-II V3000 in a compact
PCMCIA form factor. By partitioning the complex algorithms
in the 4G simulator to the hardware accelerator, we apply
an efficient Catapult-C methodology to quickly evaluate the
area/speed tradeoffs and rapidly schedule synthesizable RTL
models for implementation. The simulation time is accelerated by
100£ for a QRD-M algorithm. This not only enables much faster
verification in the 4G standard environment, but also provides
software/hardware co-design and rapid prototyping of the core
algorithm in a realistic fixed-point platform.
Description
Conference paper
Citation
Published Version
Keyword
Type
Conference paper
Citable link to this page
https://hdl.handle.net/1911/19927Metadata
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