An FPGA-based Daughtercard for TIs C6000 family of DSKs
Cavallaro, Joseph R.
novel curricula; rapid prototyping; task-partitioning; system-on-a-chip; FPGA; signal processing
In this paper we present an FPGA-based daughtercard designed for TIs C6000 family of DSP Starter Kits (DSKs). The hardware, initially designed for a course project, provides a platform for studying heterogeneous systems and hardware software co-design. Students will leverage the DSK-FPGA system for rapid prototyping of signal processing algorithms and to study task-partitioning and system integration. These techniques are becoming increasingly important for system designers as we move to system-on-chip (SOC) devices. The daughtercard hardware is fully functional, and a software package is being developed to provide a seamless communication interface between the DSK and FPGA.
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