VLSI Architectures for Multitier Wireless Systems

Abstract

Next-generation computing systems will be highly integrated using wireless networking. The Rice Everywhere NEtwork (RENÃ ) project is exploring the integration of WCDMA cellular systems, high speed wireless LANs, and home wireless networks to produce a seamless multitier network interface. We are currently developing a simulation acceleration testbed and a multitier network interface card (mNIC) consisting of DSP processors, custom VLSI ASICs, and FPGAs for baseband signal processing to interact with the various RF units and the host processor. This testbed will also allow us to explore high performance algorithm alternatives through computer aided design tools for rapid prototyping and hardware/software co-design of embedded systems.