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    CORDIC Arithmetic for an SVD Processor

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    Author
    Cavallaro, Joseph R.; Luk, Franklin T.
    Date
    1988-06-20
    Abstract
    Arithmetic issues in the calculation of the Singular Value Decomposition (SVD) are discussed. Traditional algorithms using hardware division and square root are replaced with the special purpose CORDIC algorithms for computing vector rotations and inverse tangents. The CORDIC 2 x 2 SVD processor can be twice as fast as one assembled from traditional hardware units. A prototype VLSI implementation of a CORDIC SVD processor array is planned for use in real-time signal processing applications.
    Description
    Journal Paper
    Citation
    J. R. Cavallaro and F. T. Luk, "CORDIC Arithmetic for an SVD Processor," Journal of Parallel and Distributed Computing, vol. 5, no. 3, 1988.
    Published Version
    http://dx.doi.org/10.1109/ARITH.1987.6158686
    Keyword
    Singular Value Decomposition (SVD); CORDIC algorithms; VLSI; Singular Value Decomposition (SVD); CORDIC algorithms; More... VLSI Less...
    Type
    Journal article
    Citable link to this page
    https://hdl.handle.net/1911/19758
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    • ECE Publications [1461]
    • Rice Wireless [268]

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    Managed by the Digital Scholarship Services at Fondren Library, Rice University
    Physical Address: 6100 Main Street, Houston, Texas 77005
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    Site Map