Show simple item record

dc.contributor.advisor Zwaenepoel, Willy
dc.creatorWu, Michael
dc.date.accessioned 2009-06-04T06:30:00Z
dc.date.available 2009-06-04T06:30:00Z
dc.date.issued 1994
dc.identifier.urihttps://hdl.handle.net/1911/17039
dc.description.abstract This paper describes the architecture of eNVy, a large non-volatile main memory storage system built primarily with Flash memory. Flash provides persistent storage with solid-state memory access times at a lower cost than other solid-state technologies. eNVy presents its storage space as a linear, memory mapped array rather than as a disk emulator in order to provide an efficient and easy to use software interface. Flash chips are write-once, bulk-erase devices whose contents cannot be updated in-place. They suffer from slow write times and limited program/erase cycles. eNVy uses a copy-on-write scheme, some battery-backed SRAM, and parallel operation to overcome these problems and provide low latency in-place update semantics. A specialized cleaning algorithm maximizes the lifetime of the Flash array. Simulations show that eNVy can handle I/O rates corresponding to approximately 30,000 TPS on the TPC-A benchmark with average latencies as low as 180ns for reads and 200ns for writes.
dc.format.extent 56 p.
dc.format.mimetype application/pdf
dc.language.iso eng
dc.subjectElectronics
Electrical engineering
Computer science
dc.title The architecture of eNVy, a non-volatile, main memory storage system
dc.type.genre Thesis
dc.type.material Text
thesis.degree.department Computer Science
thesis.degree.discipline Engineering
thesis.degree.grantor Rice University
thesis.degree.level Masters
thesis.degree.name Master of Science
dc.identifier.citation Wu, Michael. "The architecture of eNVy, a non-volatile, main memory storage system." (1994) Master’s Thesis, Rice University. https://hdl.handle.net/1911/17039.


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record