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    Performance of multiprocessors and parallel algorithms: Quicksort, a case study

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    Author
    Patil, Indira M.
    Date
    1989
    Advisor
    Briggs, Faye A.
    Degree
    Doctor of Philosophy
    Abstract
    Performance of parallel algorithms on multiprocessors has been traditionally analyzed by looking at either the algorithm or the architecture of the multiprocessor system. However, it is important to study the combined effect of both these factors in order to evaluate and predict performance. A different methodology based on approximate trace-driven simulation is adopted in this thesis to study the performance of a class of non-numerical algorithms. Performance of parallel quick-sort and parallel quick-merge sort is investigated in order to demonstrate the methodology as well as develop an understanding of the limitations imposed by a cache-based single bus environment on achievable speedup. A wide range of issues including the effect of cache parameters, coherency protocol, scheduling mechanisms and technology effects are discussed in the context of performance of the two versions of parallel quick-sort.
    Keyword
    Electronics; Electrical engineering
    Citation
    Patil, Indira M.. "Performance of multiprocessors and parallel algorithms: Quicksort, a case study." (1989) Diss., Rice University. http://hdl.handle.net/1911/16278.
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    • ECE Theses and Dissertations [597]
    • Rice University Electronic Theses and Dissertations [12052]

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    Managed by the Digital Scholarship Services at Fondren Library, Rice University
    Physical Address: 6100 Main Street, Houston, Texas 77005
    Mailing Address: MS-44, P.O.BOX 1892, Houston, Texas 77251-1892