Now showing items 1-20 of 253

    • Accelerating Computer Vision Algorithms Using OpenCL Framework on Mobile Devices - A Case Study 

      Wang, Guohui; Xiong, Y.; Yun, Jay; Cavallaro, Joseph R. (2013-06)
      Recently, general-purpose computing on graphics processing units (GPGPU) has been enabled on mobile devices thanks to the emerging heterogeneous programming models such as OpenCL. The capability of GPGPU on mobile devices ...
    • Adaptive Fault Detection and Tolerance for Robots 

      Visinsky, Monica L.; Cavallaro, Joseph R.; Walker, Ian D. (1994-08-01)
      In existing robot fault detection schemes, sensed values of the joint status (position, velocity, etc.) are typically compared against expected or desired values, and if a given threshold is exceeded, a fault is inferred. ...
    • Analysis of Robots for Hazardous Environments 

      Harpel, Barbara McLaughlin; Dugan, Joanne Bechta; Walker, Ian D.; Cavallaro, Joseph R. (1997-01-01)
      Reliability analysis of fault tolerant systems often ignores the small probability that a failure might not be detected or, if detected, may not be properly handled. The probability that the failure is detected and properly ...
    • Application-Specific Accelerators for Communications 

      Sun, Yang; Amiri, Kiarash; Brogioli, Michael; Cavallaro, Joseph R. (2010-01-01)
      For computation-intensive digital signal processing algorithms, complexity is exceeding the processing capabilities of general-purpose digital signal processors (DSPs). In some of these applications, DSP hardware accelerators ...
    • Approximate Matrix Inversion for High-Throughput Data Detection in Large-Scale MIMO Uplink 

      Wu, M.; Yin, B.; Vosoughi, A.; Studer, C.; Cavallaro, Joseph R.; Dick, C. (2013-05)
      The high processing complexity of data detection in the large-scale multiple-input multiple-output (MIMO) uplink necessitates high-throughput VLSI implementations. In this paper, we propose—to the best of our knowledge—first ...
    • Architecture and Algorithm for a Stochastic Soft-output MIMO Detector 

      Amiri, Kiarash; Radosavljevic, Predrag; Cavallaro, Joseph R. (2007-11-04)
      In this paper, we propose a novel architecture for a soft-output stochastic detector in multiple-input, multiple-output (MIMO) systems. The stochastic properties of this detector are studied and derived in this work, ...
    • Architecture and Algorithm for a Stochastic Soft-output MIMO Detector 

      Amiri, Kiarash; Radosavljevic, Predrag; Cavallaro, Joseph R. (2007-11-01)
      In this paper, we propose a novel architecture for a soft-output stochastic detector in multiple-input, multiple-output (MIMO) systems. The stochastic properties of this detector are studied and derived in this work, and ...
    • ARCHITECTURE DESIGN AND IMPLEMENTATION OF THE INCREASING RADIUS - LIST SPHERE DETECTOR ALGORITHM 

      Myllylä, Markus; Juntti, Markku; Cavallaro, Joseph R. (2009-04-01)
      A list sphere detector (LSD) is an enhancement of a sphere detector (SD) that can be used to approximate the optimal MAP detector. In this paper, we introduce a novel architecture for the increasing radius (IR)-LSD algorithm, ...
    • Architecture Design and Implementation of the Metric First List Sphere Detector Algorithm 

      Myllylä, Markus; Cavallaro, Joseph R.; Juntti, Markku (2011-05-01)
      Soft-output detection of a multiple-input–multiple-output (MIMO) signal pose a significant challenge in future wireless systems. In this paper, we introduce a soft-output modified metric first (MMF)-LSD algorithm for MIMO ...
    • Architectures for a CORDIC SVD Processor 

      Cavallaro, Joseph R.; Luk, Franklin T. (1986-08-21)
      Architectures for systolic array processor elements for calculating the singular value decomposition (SVD) are proposed. These special purpose VLSI structures incorporate the coordinate rotation (CORDIC) algorithms to ...
    • Architectures for Cognitive Radio Testbeds and Demonstrators – An Overview 

      Gustafsson, Oscar; Amiri, Kiarash; Andersson, Dennis; Blad, Anton; Bonner, Christian; Cavallaro, Joseph R.; Declerck, Jeroen; Dejonghe, Antoine; Eliardsson, Patrik; Glasse, Miguel; Hayar, Aawatif; Hollevoet, Lieven; Hunter, Chris; Joshi, Madhura; Kaltenberger, Florian; Knopp, Raymond; Le, Khanh; Miljanic, Zoran; Murphy, Patrick; Naessens, Frederik; Nikaein, Navid; Nussbaum, Dominique; Pacalet, Renaud; Raghavan, Praveen; Sabharwal, Ashutosh; Sarode, Onkar; Spasojevic, Predrag; Sun, Yang; Tullberg, Hugo M.; Vander Aa, Tom; Van der Perre, Liesbet; Wetterwald, Michelle; Wu, Michael (2010-06-01)
      Wireless communication standards are developed at an ever-increasing rate of pace, and significant amounts of effort is put into research for new communication methods and concepts. On the physical layer, such topics include ...
    • Architectures for Heterogeneous Multi-Tier Networks 

      Cavallaro, Joseph R. (2002-01-15)
      Next-generation wireless computing platforms will contain flexible communications capabilites. At Rice University, the Rice Everywhere NEtwork (RENE) project is investigating a multi-standard, multi-tier integration of ...
    • Arithmetic Acceleration Techniques for Wireless Communication Receivers 

      Das, Suman; Rajagopal, Sridhar; Sengupta, Chaitali; Cavallaro, Joseph R. (1999-10-20)
      We develop techniques to accelerate the implementation of the next generation wireless communication algorithms in hardware. We discuss an implementation of a key computationally intensive baseband algorithm for joint ...
    • ASIC Implementation Comparison of SIC and LSD Receivers for MIMO-OFDM 

      Ketonen, Johanna; Myllylä, Markus; Juntti, Markku; Cavallaro, Joseph R. (2008-10-01)
      MIMO-OFDM receivers with horizontal encoding are considered in this paper. The successive interference cancellation (SIC) algorithm is compared to the K-best list sphere detector (LSD). A modification to the K-best LSD ...
    • ASIP Architecture for Future Wireless Systems: Flexibility and Customization 

      Cavallaro, Joseph R.; Radosavljevic, Predrag (2004-06-01)
      Efficiency and flexibility are crucial features of the processors in the next generation of wireless cellular systems. Processors need to be efficient in order to satisfy real-time requirements for very demanding algorithms ...
    • ASIP Architecture Implementation of Channel Equalization Algorithms for MIMO Systems in WCDMA Downlink 

      Radosavljevic, Predrag; Cavallaro, Joseph R.; de Baynast, Alexandre (2004-09-01)
      This paper presents a customized and flexible hardware implementation of linear iterative channel equalization algorithms for WCDMA downlink transmission in 3G wireless system with multiple transmit and receive antennas ...
    • Automated Evaluation of Critical Features in VLSI Layouts Based on Photolithographic Simulations 

      Cavallaro, Joseph R.; Sengupta, Chaitali; Tittel, Frank K.; Wilson, William L. Jr. (1996-01-01)
      This paper describes a CAD tool (An Integrated CAD Framework) which links VLSI layout editors to lithographic simulators and provides information on the simulated resolution of a feature to the circuit designer. The designer ...
    • Automated Evaluation of Critical Features in VLSI Layouts Based on Photolithographic Simulations 

      Sengupta, Chaitali; Cavallaro, Joseph R.; Wilson, William L.; Tittel, Frank K. (1997-11-01)
      In this paper, we address the problem of identifying and evaluating “critical features” in an integrated circuit (IC) layout. The “critical features” (e.g., nested elbows and open ends) are areas in the layout that are ...
    • Baseband Signal Compression in Wireless Base Stations 

      Vosoughi, Aida; Wu, Michael; Cavallaro, Joseph R. (2012-12-01)
      To comply with the evolving wireless standards, base stations must provide greater data rates over the serial data link between base station processor and RF unit. This link is especially important in distributed antenna ...
    • A bit-streaming pipelined multiuser detector for wireless communications 

      Rajagopal, Sridhar; Cavallaro, Joseph R. (2001-05-20)
      This paper presents a bit-streaming, pipelined and reduced complexity architecture to meet real-time requirements for asynchronous multiuser detection in wireless communication CDMA receivers. Typically, asynchronous ...