Wireless Synchronization and Spatial Combining of Widely-spaced mm-wave Arrays in Silicon
Doctor of Philosophy
Due to the rapid advancement of semiconductor processes and the maturity of sub-5GHz RF design, there has been increasing interest in the higher-frequency, mm-wave (30GHz to 300GHz) and THz (300GHz to 3THz) regime. The higher carrier frequency enables exciting new applications such as radar, mm-wave imaging and spectroscopy. The main challenges at these frequencies include miniaturization, power generation and beamforming. Miniaturization allows for low-cost and accessible sensing applications. Higher power extends the detectable distance while a narrow beamwidth improves the angular resolution in radar imaging systems. In this thesis, we take various approaches to address these challenges. First, we present a fully-integrated transceiver for time-domain electron paramagnetic resonance (EPR) spectroscopy implemented using a 0.13μm SiGe BiCMOS technology. The system utilizes an on-chip resonator to study time domain relaxation behavior of paramagnetic samples, i.e. materials with unpaired electron spins. The single-chip EPR spectrometer consists of an EPR resonator, 22-26GHz tunable VCO, a programmable pulse generation block, RF buffer and power amplifier, a multi-stage LNA, and down-conversion mixer all in a 2mm2-size chip area. Time-domain transceiver operation is successfully measured with a 1-nS pulse width. This is the first demonstration of a fully-integrated, time-domain mm-wave EPR transceiver in silicon. Next, we present the design of a Wirelessly Synchronized Multi-chip Array (WSMA) in 65-nm CMOS. The proposed architecture makes use of a central wireless signal to synchronize a mm-wave array, eliminating the need for connecting wires between the array elements. Wireless injection locking of a single chip is successfully demonstrated and a 3-dB linewidth of 400 Hz at a carrier frequency of 50 GHz is achieved (stability ratio of 8 ppb). In addition, a 2-element WSMA with an array aperture greater than 20 wavelengths is demonstrated using the proposed transceiver architecture. The reported transceiver includes a receiving on-chip antenna, a low-noise amplifier, an injection-locked voltage-controlled oscillator, a buffer amplifier, an in-phase/quadrature generator, a phase shifter, a power amplifier, and a transmitting on-chip antenna. The chip is fabricated in a 65-nm CMOS process and occupies an area of 1.7 mm x 3.8 mm. This work sets the foundation for increasing the array aperture through wireless injection locking, extending traditional array systems into the high-resolution, narrow-beamwidth regime. Finally, a 500GHz 2×1 transmitter array based on the WSMA architecture is designed and implemented in 90nm SiGe BiCMOS technology. Wireless synchronization allows for coherent operation of the THz array and enables rapid scaling of the radiated power and narrowing of the array beamwidth. The RX consists of an on-chip dipole antenna, a phase shifter, buffers, and a frequency doubler. The TX consists of an injection-locked oscillator, buffers, power amplifiers, ×5 frequency multipliers and on-chip dipole antennas. Substrate cancellation enhances the array radiation efficiency. The multiplier-last architecture enables systematic and optimal design of the oscillator and the antenna. An output power of −10.3dBm at 500GHz is demonstrated in this design. The chip size is 2.2mm × 2.4mm.