Performance analysis of data skewing in parallel memories
Harper, David Tennyson
Jump, J. Robert
Master of Science
Processor execution speeds have increased dramatically in the last few years while memory speeds have failed to keep pace. This has caused the bandwidth of the memory subsystem to become the system bottleneck. The problem is particularly critical in a vector processing environment- where high speed processors perform computations involving large quantities of data. This thesis investigates the technique of data skewing to bring about an increase in throughput of vector accesses over that obtained with the use of conventional interleaving techniques. Several analytic results are shown including a closed form expression for the periodicity of the sequence of module references generated during a vector access. Simulation techniques are used to show the relationship of several parameters, of both the physical architecture of the memory system and of the load presented to the system, to the system throughput. Finally. it is shown that through the use of recurrences, feasible implementations of data skewing techniques can be realized.