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High-Level Design Tools for Complex DSP Applications

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Title: High-Level Design Tools for Complex DSP Applications
Author: Sun, Yang; Amiri, Kiarash; Wang, Guohui; Yin, Bei; Cavallaro, Joseph R.; Ly, Tai
Type: Book chapter
Publisher: Elsevier, Waltham, MA
Citation: Y. Sun, K. Amiri, G. Wang, B. Yin, J. R. Cavallaro and T. Ly, "High-Level Design Tools for Complex DSP Applications," vol. Chapter 8, pp. 133-155, 2012.
Abstract: High-level synthesis design methodology - High level synthesis (HLS) [1], also known as behavioral synthesis and algorithmic synthesis, is a design process in which a high level, functional description of a design is automatically compiled into a RTL implementation that meets certain user specified design constraints. The HLS design description is ‘high level’ compared to RTL in two aspects: design abstraction, and specification language.
Date Published: 2012-07-12

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  • ECE Publications [1047 items]
    Publications by Rice University Electrical and Computer Engineering faculty and graduate students
  • CMC Publications [275 items]
    Publications by Rice Faculty and graduate students in multimedia communications