CORDIC Arithmetic for an SVD Processor

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Title: CORDIC Arithmetic for an SVD Processor
Author: Cavallaro, Joseph R.; Luk, Franklin T.
Type: Conference Paper
Publisher: The Computer Society of the IEEE
Citation: J. R. Cavallaro and F. T. Luk,"CORDIC Arithmetic for an SVD Processor," in IEEE 8th Symposium on Computer Arithmetic, 1987, pp. 113-120.
Abstract: Arithmetic issues in the calculation of the Singular Value Decomposition (SVD) are discussed. Traditional algorithms using hardware division and square root are replaced with the special purpose CORDIC algorithms for computing vector rotations and inverse tangents. The CORDIC 2 x 2 SVD processor can be twice as fast as one assembled from traditional hardware units. A prototype VLSI implementation of a CORDIC SVD processor array is planned for use in real-time signal processing applications.
Date Published: 1987-05-01

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