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Y. Guo, D. McCain, G. Xu and J. R. Cavallaro,"Rapid Scheduling of Efficient FPGA Architectures for Next-Generation HSDPA Wireless System Using Precision C Synthesizer," in IEEE International Workshop on Rapid Systems Prototyping,, pp. 179-185.
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G. Xu, S. Rajagopal, J. R. Cavallaro and B. Aazhang, "VLSI implementation of the multistage detector for next generation wideband CDMA receivers," Journal of VLSI Signal Processing, vol. 30, no. 1-3, pp. 21-33, 2002.
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S. Rajagopal, G. Xu and J. R. Cavallaro,"Implementation of Channel Estimation and Multiuser Detection Algorithms for W-CDMA on Digital Signal Processors," in Texas Instruments TMS320 Educators Conference,
Y. Guo, D. McCain, G. Xu and J. R. Cavallaro,"Rapid Scheduling of Efficient FPGA Architectures for Next-Generation HSDPA Wireless System Using Precision C Synthesizer," in IEEE International Workshop on Rapid Systems Prototyping,, pp. 179-185.
G. Xu, S. Rajagopal, J. R. Cavallaro and B. Aazhang, "VLSI implementation of the multistage detector for next generation wideband CDMA receivers," Journal of VLSI Signal Processing, vol. 30, no. 1-3, pp. 21-33, 2002.
S. Rajagopal, G. Xu and J. R. Cavallaro,"Implementation of Channel Estimation and Multiuser Detection Algorithms for W-CDMA on Digital Signal Processors," in Texas Instruments TMS320 Educators Conference,