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G. Wang, H. Shen, B. Yin, M. Wu, Y. Sun and J. R. Cavallaro,"Parallel Nonbinary LDPC Decoding on GPU," in 2012 IEEE Asilomar Conference on Signals, Systems, and Computers, 2012
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B. Yin, M. Wu, G. Wang and J. R. Cavallaro,"Low Complexity Opportunistic Decoder for Network Coding," in 2012 IEEE Asilomar Conference on Signals, Systems, and Computers, 2012
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Y. Sun, K. Amiri, G. Wang, B. Yin, J. R. Cavallaro and T. Ly, "High-Level Design Tools for Complex DSP Applications," vol. Chapter 8, pp. 133-155, 2012.
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M. Wu, Y. Sun, G. Wang and J. R. Cavallaro, "Implementation of a High Throughput 3GPP Turbo Decoder on GPU," Journal of Signal Processing Systems, vol. 65, no. 2, pp. 171-183, 2011.
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G. Wang, M. Wu and Y. Sun,"GPU Accelerated Scalable Parallel Decoding of LDPC Codes," in 2011 IEEE Asilomar Conference on Signals, Systems, and Computers, 2011, pp. 2053-2057.
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G. Wang, Y. Sun, J. R. Cavallaro and Y. Guo,"High-Throughput Contention-Free Concurrent Interleaver Architecture for Multi-Standard Turbo Decoder," in IEEE International Conference on Application-specific System, Architectures and Processors (ASAP), 2011, pp. 113-121.
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G. Wang, M. Wu, Y. Sun and J. R. Cavallaro,"A Massively Parallel Implementation of QC-LDPC Decoder on GPU," in IEEE 9th Symposium on Application Specific Processors (SASP), 2011, pp. 82-85.
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Y. Sun, G. Wang and J. R. Cavallaro,"Multi-Layer Parallel Decoding Algorithm and VLSI Architecture for Quasi-Cyclic LDPC Codes," in International Symposium on Circuits and Systems (ISCAS), 2011, pp. 1776-1779.
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G. Wang, B. Yin, K. Amiri, Y. Sun, M. Wu and J. R. Cavallaro,"FPGA Prototyping of A High Data Rate LTE Uplink Baseband Receiver," in 43rd Asilomar Conference on Signals, Systems and Computers, 2009, pp. 248-252.
G. Wang, H. Shen, B. Yin, M. Wu, Y. Sun and J. R. Cavallaro,"Parallel Nonbinary LDPC Decoding on GPU," in 2012 IEEE Asilomar Conference on Signals, Systems, and Computers, 2012
B. Yin, M. Wu, G. Wang and J. R. Cavallaro,"Low Complexity Opportunistic Decoder for Network Coding," in 2012 IEEE Asilomar Conference on Signals, Systems, and Computers, 2012
Y. Sun, K. Amiri, G. Wang, B. Yin, J. R. Cavallaro and T. Ly, "High-Level Design Tools for Complex DSP Applications," vol. Chapter 8, pp. 133-155, 2012.
M. Wu, Y. Sun, G. Wang and J. R. Cavallaro, "Implementation of a High Throughput 3GPP Turbo Decoder on GPU," Journal of Signal Processing Systems, vol. 65, no. 2, pp. 171-183, 2011.
G. Wang, M. Wu and Y. Sun,"GPU Accelerated Scalable Parallel Decoding of LDPC Codes," in 2011 IEEE Asilomar Conference on Signals, Systems, and Computers, 2011, pp. 2053-2057.
High-Throughput Contention-Free Concurrent Interleaver Architecture for Multi-Standard Turbo DecoderG. Wang, Y. Sun, J. R. Cavallaro and Y. Guo,"High-Throughput Contention-Free Concurrent Interleaver Architecture for Multi-Standard Turbo Decoder," in IEEE International Conference on Application-specific System, Architectures and Processors (ASAP), 2011, pp. 113-121.
G. Wang, M. Wu, Y. Sun and J. R. Cavallaro,"A Massively Parallel Implementation of QC-LDPC Decoder on GPU," in IEEE 9th Symposium on Application Specific Processors (SASP), 2011, pp. 82-85.
Y. Sun, G. Wang and J. R. Cavallaro,"Multi-Layer Parallel Decoding Algorithm and VLSI Architecture for Quasi-Cyclic LDPC Codes," in International Symposium on Circuits and Systems (ISCAS), 2011, pp. 1776-1779.
G. Wang, B. Yin, K. Amiri, Y. Sun, M. Wu and J. R. Cavallaro,"FPGA Prototyping of A High Data Rate LTE Uplink Baseband Receiver," in 43rd Asilomar Conference on Signals, Systems and Computers, 2009, pp. 248-252.