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S. Rajagopal, S. Bhashyam, J. R. Cavallaro and B. Aazhang,"Efficient VLSI Architectures for Baseband Signal Processing for Wireless Base-Station Receivers," in IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP),, pp. 173-184.
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V. Chandrasekhar, F. Livingston and J. R. Cavallaro, "Reducing dynamic power consumption in next generation DS-CDMA mobile communication receivers," International Journal of Embedded Systems, vol. 3, no. 3, pp. 128-140, 2008.
S. Rajagopal, S. Bhashyam, J. R. Cavallaro and B. Aazhang,"Efficient VLSI Architectures for Baseband Signal Processing for Wireless Base-Station Receivers," in IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP),, pp. 173-184.
V. Chandrasekhar, F. Livingston and J. R. Cavallaro, "Reducing dynamic power consumption in next generation DS-CDMA mobile communication receivers," International Journal of Embedded Systems, vol. 3, no. 3, pp. 128-140, 2008.