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Y. Sun, J. R. Cavallaro, Y. Zhu and G. Manish, "Configurable and Scalable Turbo Decoder for 4G Wireless Receivers," vol. 2010, pp. 622-643, 2010.
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Y. Sun and J. R. Cavallaro,"High Throughput VLSI Architecture for Soft-Output MIMO Detection Based on A Greedy Graph Algorithm," in ACM/IEEE Great Lakes Symposium on VLSI, 2009, pp. 445-450.
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Y. Sun and J. R. Cavallaro, "High-Throughput Soft-Output MIMO Detector Based on Path-Preserving Trellis-Search Algorithm," IEEE Transactions on VLSI Systems, vol. 20, no. 7, pp. 1235-1247, 2012.
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Y. Sun, G. Wang and J. R. Cavallaro,"Multi-Layer Parallel Decoding Algorithm and VLSI Architecture for Quasi-Cyclic LDPC Codes," in International Symposium on Circuits and Systems (ISCAS), 2011, pp. 1776-1779.
Y. Sun, J. R. Cavallaro, Y. Zhu and G. Manish, "Configurable and Scalable Turbo Decoder for 4G Wireless Receivers," vol. 2010, pp. 622-643, 2010.
High Throughput VLSI Architecture for Soft-Output MIMO Detection Based on A Greedy Graph AlgorithmY. Sun and J. R. Cavallaro,"High Throughput VLSI Architecture for Soft-Output MIMO Detection Based on A Greedy Graph Algorithm," in ACM/IEEE Great Lakes Symposium on VLSI, 2009, pp. 445-450.
Y. Sun and J. R. Cavallaro, "High-Throughput Soft-Output MIMO Detector Based on Path-Preserving Trellis-Search Algorithm," IEEE Transactions on VLSI Systems, vol. 20, no. 7, pp. 1235-1247, 2012.
Y. Sun, G. Wang and J. R. Cavallaro,"Multi-Layer Parallel Decoding Algorithm and VLSI Architecture for Quasi-Cyclic LDPC Codes," in International Symposium on Circuits and Systems (ISCAS), 2011, pp. 1776-1779.