Now showing items 1-60 of 155
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C. Steger, P. Radosavljevic and P. Frantz,"802.11b Operating in a Mobile Channel: Performance and Challenges," in Communications Design Conference, -
M. L. Visinsky, J. R. Cavallaro and I. D. Walker,"Adaptive Fault Detection and Tolerance for Robots," in First World Automation Conference, 1994, pp. 205-210. -
B. M. Harpel, J. B. Dugan, I. D. Walker and J. R. Cavallaro,"Analysis of Robots for Hazardous Environments," in IEEE Annual Reliability and Maintainability Symposium, 1997, pp. 111-116. -
K. Amiri, P. Radosavljevic and J. R. Cavallaro,"Architecture and Algorithm for a Stochastic Soft-output MIMO Detector," in Forty-First Asilomar Conference on Signals, Systems and Computers, 2007, pp. 1034-1038. -
K. Amiri, P. Radosavljevic and J. R. Cavallaro,"Architecture and Algorithm for a Stochastic Soft-output MIMO Detector," in 41st Asilomar Conference on Signals, Systems and Computers, 2007, pp. 1034-1038. -
M. Myllylä, M. Juntti and J. R. Cavallaro,"ARCHITECTURE DESIGN AND IMPLEMENTATION OF THE INCREASING RADIUS - LIST SPHERE DETECTOR ALGORITHM," in International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2009, pp. 553-556. -
O. Gustafsson, K. Amiri, D. Andersson, A. Blad, C. Bonner, J. R. Cavallaro, J. Declerck, A. Dejonghe, P. Eliardsson, M. Glasse, A. Hayar, L. Hollevoet, C. Hunter, M. Joshi, F. Kaltenberger, R. Knopp, K. Le, Z. Miljanic, P. Murphy, F. Naessens, N. Nikaein, D. Nussbaum, R. Pacalet, P. Raghavan, A. Sabharwal, O. Sarode, P. Spasojevic, Y. Sun, H. M. Tullberg, T. Vander Aa, L. Van der Perre, M. Wetterwald and M. Wu,"Architectures for Cognitive Radio Testbeds and Demonstrators – An Overview," in Cognitive Radio Oriented Wireless Networks & Communications (CROWNCOM), 2010, pp. 1-6. -
S. Das, S. Rajagopal, C. Sengupta and J. R. Cavallaro,"Arithmetic Acceleration Techniques for Wireless Communication Receivers," in Asilomar Conference on Signals, Systems, and Computers,, pp. 1469 - 1474. -
J. Ketonen, M. Myllylä, M. Juntti and J. R. Cavallaro,"ASIC Implementation Comparison of SIC and LSD Receivers for MIMO-OFDM," in 42nd Asilomar Conference on Signals, Systems and Computers, 2008, pp. 1881-1885. -
J. R. Cavallaro, C. Sengupta, F. K. Tittel and W. L. J. Wilson,"Automated Evaluation of Critical Features in VLSI Layouts Based on Photolithographic Simulations," in NSF Design and Manufacturing Grantees Conference, 1996, pp. 345-346. -
S. Rajagopal and J. R. Cavallaro,"A bit-streaming pipelined multiuser detector for wireless communications," in IEEE International Symposium on Circuits and Systems (ISCAS),, pp. 128-131. -
Y. Guo and D. McCain,"Compact Hardware Accelerator for Functional Verification and Rapid Prototyping of 4G Wireless Communication Systems," in Asilomar Conference on Signals, Systems, and Computers, -
M. Myllylä, P. Silvola, M. Juntti and J. R. Cavallaro,"COMPARISON OF TWO NOVEL LIST SPHERE DETECTOR ALGORITHMS FOR MIMO-OFDM SYSTEMS," in IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC), 2006 -
M. C. Brogioli and J. R. Cavallaro,"Compiler Driven Architecture Design Space Exploration for DSP Workloads: A Study in Software Programmability Versus Hardware Acceleration," in 43rd Asilomar Conference on Signals, Systems and Computers, 2009, pp. 221-225. -
M. Myllylä, J. Hintikka, J. R. Cavallaro, M. Juntti, M. Limingoja and A. Byman,"Complexity Analysis of MMSE Detector Architectures for MIMO OFDM Systems," in 39th Asilomar Conference on Signals, Systems and Computers, 2005, pp. 75-81. -
Y. Sun, Y. Zhu, M. Goel and J. R. Cavallaro,"Configurable and Scalable High Throughput Turbo Decoder Architecture for Multiple 4GWireless Standards," in IEEE International Conference on Application-Specific System, Architectures and Processors (ASAP), 2008, pp. 209-214. -
J. R. Cavallaro and F. T. Luk,"CORDIC Arithmetic for an SVD Processor," in IEEE 8th Symposium on Computer Arithmetic, 1987, pp. 113-120. -
D. Rajan, A. Sabharwal and B. Aazhang,"Delay and Rate Constrained Transmission Policies over Wireless Channels," in Communication Theory Mini-Conference in conjunction with GLOBECOM, -
M. Khojastepour and A. Sabharwal,"Delay-constrained Scheduling: Power Efficiency, Filter Design, and Bounds," in IEEE INFOCOM, -
M. C. Brogioli, M. Gadhiok and J. R. Cavallaro,"Design and Analysis of Heterogeneous DSP/FPGA Based Architectures for 3GPP Wireless Systems," in IEEE Real-Time and Embedded Technology and Applications Symposium; Work in Progress Session, 2006, pp. 29-32. -
C. Dick, K. Amiri, J. R. Cavallaro and R. Rao,"Design and Architecture of Spatial Multiplexing MIMO Decoders for FPGAs," in 42nd Asilomar Conference on Signals, Systems and Computers, 2008, pp. 160-164. -
P. Frantz and Y. Yamada,"Development of Japanese-language DSP Education Content in the Connexions Project," in International Mini-Conference on Information Electronics System, -
Y. Guo, J. (. Zhang, D. McCain and J. R. Cavallaro,"Displacement MIMO Kalman Equalizer for CDMA Downlink in Fast Fading Channels," in IEEE Globecom, -
M. Karkooti and J. R. Cavallaro,"Distributed Decoding in Cooperative Communications," in 41st Asilomar Conference on Signals, Systems and Computers, 2007, pp. 824-828. -
P. Frantz, H. Choi and R. G. Baraniuk,"DSP Education At Rice University," in Texas Instruments TMS320 Educators Conference, -
P. Murphy, V. Bharadwaj, E. Welsh and P. Frantz,"A DSP-Based Platform for Wireless Video Compression," in Globecom,, pp. 1754-1758. -
J. R. Cavallaro and I. D. Walker,"Dynamic Fault Reconfigurable Intelligent Control Architectures for Robotics," in Fifth ANS Topical Meeting on Robotics and Remote Systems, 1993, pp. 305-311. -
M. L. Visinsky, J. R. Cavallaro and I. D. Walker,"Dynamic Senor-Based Fault Detection for Robots," in SPIE Conference on Cooperative Intelligent Robotics in Space IV, 1993, pp. 385-396. -
T. D. Dorney, S. Bhashyam, A. Doran, H. Choi, P. Flandrin and R. G. Baraniuk,"Edge Localized Image Sharpening via Reassignment with Application to Computed Tomography," in SPIE Technical Conference on Mathematical Modeling, Estimation, and Imaging, -
M. Myllylä, J. Antikainen, M. Juntti and J. R. Cavallaro,"The effect of LLR clipping to the complexity of list sphere detector algorithms," in 41st Asilomar Conference on Signals, Systems and Computers, 2007, pp. 159-1563. -
M. Myllylä, M. Juntti and J. R. Cavallaro,"The Effect of Preprocessing to the Complexity of List Sphere Detector Algorithms," in INTERNATIONAL SYMPOSIUM ON WIRELESS PERSONAL MULTIMEDIA COMMUNICATIONS (WPMC), 2008 -
Y. Guo, J. (. Zhang, D. McCain and J. R. Cavallaro,"Efficient MIMO equalization for downlink multi-code CDMA: complexity optimization and comparative study," in Globecom,, pp. 2513 - 2519. -
S. Rajagopal, S. Bhashyam, J. R. Cavallaro and B. Aazhang,"Efficient VLSI Architectures for Baseband Signal Processing for Wireless Base-Station Receivers," in IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP),, pp. 173-184. -
Y. Guo,"Efficient VLSI Architectures for Recursive Vandermonde QR Decomposition in Broadband OFDM Pre-distortion," in IEEE Wireless Communications and Networking Conference, -
H. M. Fossati, F. K. Tittel, W. L. Wilson and J. R. Cavallaro,"Enhanced VLSI Manufacturability Using an Integrated CAD Framework," in NSF Design and Manufacturing Grantees Conference, 1994, pp. 549-550. -
M. L. Leuschen, I. D. Walker, J. R. Cavallaro, R. Gamache and M. Martin,"Experimental AR Fault Detection Methods for a Hydraulic Robot," in International System Safety Conference, 2000, pp. 402-409. -
M. L. Visinsky, J. R. Cavallaro and I. D. Walker,"Expert System Framework for Fault Detection and Fault Tolerance in Robotics," in Fourth International Symposium on Robotics and Manufacturing, 1992, pp. 793-799. -
J. R. Cavallaro and I. D. Walker,"Failure Mode Analysis of a Proposed Manipulator-based Hazardous Material Retrieval System," in American Nuclear Society Topical Meeting on Robotics and Remote Systems, 1997, pp. 1096-1102. -
B. Johnston, X. Yin, A. Valenzuela and P. Frantz,"A Fast Algorithm and Testbed Evaluation for Sound Source Localization Using Sensor Networks," in IEEE Vehicular Technology Conference (VTC), -
S. Das, J. R. Cavallaro and B. Aazhang,"Fast Multi-user Detector for a Time-varying CDMA System," in SPIE Conference on Advanced Signal Processing: Algorithms, Architectures, and Implementations VII, 1997, pp. 569-580. -
M. L. Visinsky, I. D. Walker and J. R. Cavallaro,"Fault Detection and Fault Tolerance in Robotics," in 1991 NASA Space Operations, Applications, and Research Symposium, 1991, pp. 262-271. -
D. L. Hamilton, M. L. Visinsky, J. K. Bennett, J. R. Cavallaro and I. D. Walker,"Fault Tolerant Algorithms and Architectures for Robotics," in Mediterranean Electrotechnical Conference, 1994, pp. 1034-1036. -
J. R. Cavallaro, C. D. Near and M. U. Uyar,"Fault-Tolerant VLSI Processor Array for the SVD," in IEEE International Conference on Computer Design: VLSI in Computers & Processors, 1989, pp. 176-180. -
Y. Guo, D. McCain and J. R. Cavallaro,"FFT-Accelerated Iterative MIMO Chip Equalizer Architecture For CDMA Downlink," in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), -
K. Amiri, C. Dick, R. Rao and J. R. Cavallaro,"Flex-Sphere: An FPGA Configurable Sort-Free Sphere Detector For Multi-user MIMO Wireless Systems," in Software Defined Radio Forum (SDR), 2008 -
M. Wu, B. Yin and J. R. Cavallaro,"Flexible N-Way MIMO Detector on GPU," in IEEE Workshop on Signal Processing Systems, 2012, pp. 318-323. -
J. R. Cavallaro and F. T. Luk,"Floating-Point CORDIC for Matrix Computations," in IEEE International Conference on Computer Design: VLSI in Computers & Processors, 1988, pp. 40-42. -
K. Amiri and J. R. Cavallaro,"FPGA Implementation of Dynamic Threshold Sphere Detection for MIMO Systems," in 40th Asilomar Conference on Signals, Systems and Computers, 2006, pp. 94-98. -
M. Karkooti, J. R. Cavallaro and C. Dick,"FPGA Implementation of Matrix Inversion Using QRD-RLS Algorithm," in Asilomar Conference on Signals, Systems, and Computers,, pp. 1625 - 1629. -
M. Karkooti, J. R. Cavallaro and C. Dick,"FPGA Implementation of Matrix Inversion Using QRD-RLS Algorithm," in Asilomar Conference on Signals, Systems, and Computers, -
G. Wang, B. Yin, K. Amiri, Y. Sun, M. Wu and J. R. Cavallaro,"FPGA Prototyping of A High Data Rate LTE Uplink Baseband Receiver," in 43rd Asilomar Conference on Signals, Systems and Computers, 2009, pp. 248-252. -
M. Brogioli, P. Radosavljevic and J. R. Cavallaro,"A General Hardware/Software Co-design Methodology for Embedded Signal Processing and Multimedia Workloads," in 40th Asilomar Conference on Signals, Systems and Computers, 2006, pp. 1486-1490. -
E. Welsh, W. Fish and P. Frantz,"GNOMES: A Testbed for Low-Power Heterogeneous Wireless Sensor Networks," in IEEE International Symposium on Circuits and Systems (ISCAS), -
G. Wang, M. Wu and Y. Sun,"GPU Accelerated Scalable Parallel Decoding of LDPC Codes," in 2011 IEEE Asilomar Conference on Signals, Systems, and Computers, 2011, pp. 2053-2057. -
M. Wu, S. Gupta, Y. Sun and J. R. Cavallaro,"A GPU Implementation of a Real-Time MIMO Detector," in IEEE Workshop on Signal Processing Systems (SiPS), 2009, pp. 303-308. -
S. C. Kim, W. L. Plishker, S. S. Bhattacharyya and J. R. Cavallaro,"GPU-based Acceleration of Symbol Timng Recovery," in Conference on Design and Architectures for Signal and Image Processing (DASIP), 2012 -
M. Brogioli, P. Radosavljevic and J. R. Cavallaro,"Hardware/Software Co-design Methodology and DSP/FPGA Partitioning: A Case Study for Meeting Real-Time Processing Deadlines in 3.5G Mobile Receivers," in IEEE International Midwest Symposium on Circuits and Systems, 2006 -
Y. Guo, D. McCain and J. R. Cavallaro,"Hermitian Optimization and Scalable VLSI Architecture for Circulant Approximated MIMO Equalizer in CDMA Downlink," in IEEE Vehicular Technology Conference (VTC), -
High Throughput VLSI Architecture for Soft-Output MIMO Detection Based on A Greedy Graph AlgorithmY. Sun and J. R. Cavallaro,"High Throughput VLSI Architecture for Soft-Output MIMO Detection Based on A Greedy Graph Algorithm," in Great Lakes Symposium on VLSI (GLSVLSI), 2009, pp. 445-450. -
High Throughput VLSI Architecture for Soft-Output MIMO Detection Based on A Greedy Graph AlgorithmY. Sun and J. R. Cavallaro,"High Throughput VLSI Architecture for Soft-Output MIMO Detection Based on A Greedy Graph Algorithm," in ACM/IEEE Great Lakes Symposium on VLSI, 2009, pp. 445-450.