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Title:
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Memory Access Scheduling |
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Author:
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Rixner, Scott; Dally, William J.; Kapasi, Ujval J.; Mattson, Peter; Owens, John D.
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Type:
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Conference Paper |
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Keywords:
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memory system architecture; DRAM organization; media processing |
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Citation:
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S. Rixner, W. J. Dally, U. J. Kapasi, P. Mattson and J. D. Owens,"Memory Access Scheduling," in International Symposium on Computer Architecture (ISCA),, pp. 128-138. |
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Abstract:
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The bandwidth and latency of a memory system are strongly dependent on the manner in which accesses interact with the "3-D" structure of banks, rows, and columns characteristic of contemporary DRAM chips. There is nearly an order of magnitude difference in bandwidth between successive references to different columns within a row and different rows within a bank. This paper introduces memory access scheduling, a technique that improves the performance of a memory system by reordering memory references to exploit locality within the 3-D memory structure. Conservative reordering, in which the first ready reference in a sequence is performed, improves bandwidth by 40% for traces from five media benchmarks. Aggressive reordering, in which operations are scheduled to optimize memory bandwidth, improves bandwidth by 93% for the same set of applications. Memory access scheduling is particularly important for media processors where it enables the processor to make the most efficient use of scarce memory bandwidth. |
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Date Published:
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2000-06-20 |
