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DSP architectural considerations for optimal baseband processing

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Title: DSP architectural considerations for optimal baseband processing
Author: Rajagopal, Sridhar; Rixner, Scott; Cavallaro, Joseph R.; Aazhang, Behnaam
Type: Presentation
Keywords: DSP; baseband architectures
Citation: S. Rajagopal, S. Rixner, J. R. Cavallaro and B. Aazhang, "DSP architectural considerations for optimal baseband processing," Texas Instruments TMS320 Educators Conference, 2002.
Abstract: The data rate requirements for future wireless systems has increased by orders-of-magnitude (from Kbps to several Mbps), requiring more sophisticated algorithms for their implementation. This tutorial will explore different architectural issues to consider for optimal wireless baseband processing. It will look at research into real-time architectural design issues such as number of functional units, data access from memory and sequential traceback for Viterbi decoding using digital signal processors
Date Published: 2002-08-20

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  • ECE Publications [1048 items]
    Publications by Rice University Electrical and Computer Engineering faculty and graduate students
  • DSP Publications [508 items]
    Publications by Rice Faculty and graduate students in digital signal processing.