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The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology

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Title: The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology
Author: Pai, Vijay S.; Ranganathan, Parthasarathy; Adve, Sarita V.
Type: Conference Paper
Keywords: instruction-level parallelism; shared-memory multiprocessors; performance evaluation
Citation: V. S. Pai, P. Ranganathan and S. V. Adve,"The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology," in International Symposium on High Performance Computer Architecture (HPCA),, pp. 72-83.
Abstract: None
Date Published: 1997-02-20

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  • ECE Publications [1032 items]
    Publications by Rice University Electrical and Computer Engineering faculty and graduate students