VALID: Custom ASIC Verification and FPGA Education Platform

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Title: VALID: Custom ASIC Verification and FPGA Education Platform
Author: Murphy, Patrick; Welsh, Erik; Frantz, Patrick; Hardy, Ricky; Mohsenin, Tinoosh; Cavallaro, Joseph R.
Type: Conference paper
Keywords: asic; fpga; valid
Citation: P. Murphy, E. Welsh, P. Frantz, R. Hardy, T. Mohsenin and J. R. Cavallaro, "VALID: Custom ASIC Verification and FPGA Education Platform," pp. 66-67, 2003.
Abstract: This paper describes VALID, a platform for testing student designed ASICs and for teaching the basics of FPGA design. VALID is designed to maximize ease of use from a student?s perspective while maintaining enough flexibility for its use as an FPGA development and instruction platform. This system was designed entirely by students, has been successfully manufactured and is currently being used in a number of courses at Rice.
Date Published: 2003-06-01

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  • ECE Publications [1048 items]
    Publications by Rice University Electrical and Computer Engineering faculty and graduate students