Dynamic Memory Interconnections for Rapid Access

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Title: Dynamic Memory Interconnections for Rapid Access
Author: Iyer, Bala; Sinclair, J. Bartlett
Type: Report
xmlui.Rice_ECE.Keywords: parallel processing; dynamic memory; random access; sequential access
Citation: B. Iyer and J. B. Sinclair, "Dynamic Memory Interconnections for Rapid Access," Rice University ECE Technical Report, no. 8004, 1980.
Abstract: Certain aspects of bulk storage technology development have required the study of dynamic memory interconnections. Various schemes to interconnect physical storage locations have been proposed in the literature. Taking into consideration the fact that dynamic memories are characterised by a small number of i/o ports, these schemes attempt to minimise random access time or reduce sequential access time. In this paper a scheme is proposed which combines concepts of interleaving and properties of the perfect shuffle interconnection network to permit random access of items in a large bulk store in less than logarithmic time and subsequent sequential access in unit time. Asymptotic behaviour of this scheme is also examined.
Date Published: 1980-11-01

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  • ECE Publications [1053 items]
    Publications by Rice University Electrical and Computer Engineering faculty and graduate students