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Title:
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A Systolic VLSI Architecture for Complex SVD |
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Author:
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Hemkumar, Nariankadu D.; Cavallaro, Joseph R.
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Type:
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Conference Paper |
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Keywords:
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cyclic Jacobi method; complex SVD; VLSI; Brent-Luk-VanLoan |
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Citation:
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N. D. Hemkumar and J. R. Cavallaro,"A Systolic VLSI Architecture for Complex SVD," in IEEE International Symposium on Circuits and Systems (ISCAS),, pp. 1061-1064. |
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Abstract:
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A systolic algorithm for the SVD of arbitrary complex matrices, based on the cyclic Jacobi method with "parallel ordering" is presented. A novel two-step, two-sided unitary transformation scheme, tailored to the use of CORDIC algorithms for high speed arithmetic, is employed to diagonalize a complex 2x2 matrix. Architecturally, the complex SVD array is modeled on the Brent-Luk-VanLoan array for real SVD. An expandable array of O(n²) complex 2x2 matrix processors computes the SVD of an nxn matrix in O(n log n) time. A CORDIC architecture for the complex 2x2 processor with an area complexity twice that of a real 2x2 processor is proposed. Computation time for the complex SVD array is less than three times that for a real SVD array with a similar CORDIC based implementation. |
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Date Published:
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1992-05-20 |