A Systolic VLSI Architecture for Complex SVD

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Title: A Systolic VLSI Architecture for Complex SVD
Author: Hemkumar, Nariankadu D.; Cavallaro, Joseph R.
Type: Conference Paper
Keywords: cyclic Jacobi method; complex SVD; VLSI; Brent-Luk-VanLoan
Citation: N. D. Hemkumar and J. R. Cavallaro,"A Systolic VLSI Architecture for Complex SVD," in IEEE International Symposium on Circuits and Systems (ISCAS),, pp. 1061-1064.
Abstract: A systolic algorithm for the SVD of arbitrary complex matrices, based on the cyclic Jacobi method with "parallel ordering" is presented. A novel two-step, two-sided unitary transformation scheme, tailored to the use of CORDIC algorithms for high speed arithmetic, is employed to diagonalize a complex 2x2 matrix. Architecturally, the complex SVD array is modeled on the Brent-Luk-VanLoan array for real SVD. An expandable array of O(n²) complex 2x2 matrix processors computes the SVD of an nxn matrix in O(n log n) time. A CORDIC architecture for the complex 2x2 processor with an area complexity twice that of a real 2x2 processor is proposed. Computation time for the complex SVD array is less than three times that for a real SVD array with a similar CORDIC based implementation.
Date Published: 1992-05-20

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    Publications by Rice University Electrical and Computer Engineering faculty and graduate students