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Title:
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An Efficient Circulant MIMO Equalizer for CDMA Downlink: Algorithm and VLSI Architecture |
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Author:
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Guo, Yuanbin; Zhang, Jianzhong (Charlie); McCain, Dennis; Cavallaro, Joseph R.
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Type:
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Journal Paper |
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Keywords:
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MIMO equalizer; circulant; VLSI |
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Citation:
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Y. Guo, J. (. Zhang, D. McCain and J. R. Cavallaro, "An Efficient Circulant MIMO Equalizer for CDMA Downlink: Algorithm and VLSI Architecture," EURASIP Journal on Applied Signal Processing, 2005. |
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Abstract:
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In this paper, we present an efficient circulant approximation based MIMO equalizer
architecture for the CDMA downlink. This reduces the Direct-Matrix-Inverse (DMI) of size (NF x NF) with O((NF)³) complexity to some FFT operations with O(NF log<sub>2</sub>(F)) complexity and the inverse of some (N x N) sub-matrices. We then propose parallel and pipelined VLSI architectures with Hermitian optimization and reduced-state FFT for further complexity optimization. Generic VLSI architectures are derived for the (4 x 4) high-order receiver from partitioned (2 x 2) sub-matrices. This leads to more parallel VLSI design with 3x further complexity reduction. Comparative study with both the Conjugate-Gradient and DMI algorithms shows very promising performance/complexity tradeoff. VLSI design space in terms of area/time efficiency is explored extensively for layered parallelism and pipelining with a Catapult C High-Level-Synthesis methodology. |
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Date Published:
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2005-12-01 |
