VLSI Implementation of Mallat's Fast Discrete Wavelet

Files in this item

Files Size Format View
Guo2001Nov5VLSIImplem.PDF 212.4Kb application/pdf Thumbnail

Show full item record

Item Metadata

Title: VLSI Implementation of Mallat's Fast Discrete Wavelet
Author: Guo, Yuanbin; Zhang, Hongzhou; Wang, Xuguang; Cavallaro, Joseph R.
Type: Conference paper
Keywords: VLSI; DWT; Mallat
Citation: Y. Guo, H. Zhang, X. Wang and J. R. Cavallaro, "VLSI Implementation of Mallat's Fast Discrete Wavelet," vol. 1, pp. 320-324, 2001.
Abstract: This paper proposes a novel VLSI architecture to compute the DWT (discrete wavelet transform) coefficients using Mallat's algorithm with reduced complexity. We studied the commonality embedded in the mirror filters of the algorithm and use a PLA as an Address Generator (PAG) to load the data for cascaded FIR computation. By using an embedded downsampling process in the control signal design, we reduced the complexity by saving storage and computation. The prototyping design is implemented and fabricated using AMI 1.5 micron CMOS process through MOSIS.
Date Published: 2001-11-20

This item appears in the following Collection(s)

  • ECE Publications [1048 items]
    Publications by Rice University Electrical and Computer Engineering faculty and graduate students