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VLSI Architectures for Multitier Wireless Systems

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Title: VLSI Architectures for Multitier Wireless Systems
Author: Cavallaro, Joseph R.
Type: Conference Paper
Keywords: Rice Everywhere NEtwork (REN); WCDMA; cellular systems; LAN; multitier network interface card (mNIC); DSP; VLSI ASIC; FPGA
Citation: J. R. Cavallaro,"VLSI Architectures for Multitier Wireless Systems," in Air Force Research Lab Collaborative Technologies Workshop,, pp. 28-31.
Abstract: Next-generation computing systems will be highly integrated using wireless networking. The Rice Everywhere NEtwork (RENÃ ) project is exploring the integration of WCDMA cellular systems, high speed wireless LANs, and home wireless networks to produce a seamless multitier network interface. We are currently developing a simulation acceleration testbed and a multitier network interface card (mNIC) consisting of DSP processors, custom VLSI ASICs, and FPGAs for baseband signal processing to interact with the various RF units and the host processor. This testbed will also allow us to explore high performance algorithm alternatives through computer aided design tools for rapid prototyping and hardware/software co-design of embedded systems.
Date Published: 1999-11-20

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  • ECE Publications [1043 items]
    Publications by Rice University Electrical and Computer Engineering faculty and graduate students
  • CMC Publications [275 items]
    Publications by Rice Faculty and graduate students in multimedia communications
  • DSP Publications [508 items]
    Publications by Rice Faculty and graduate students in digital signal processing.